JAJSF63D April   2018  – September 2020 LMR36015

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 概要 (続き)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 System Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power-Good Flag Output
      2. 9.3.2 Enable and Start-up
      3. 9.3.3 Current Limit and Short Circuit
      4. 9.3.4 Undervoltage Lockout and Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Auto Mode
      2. 9.4.2 Forced PWM Operation
      3. 9.4.3 Dropout
      4. 9.4.4 Minimum Switch On-Time
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design 1: Low Power 24-V, 1.5-A PFM Converter
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1  Custom Design With WEBENCH Tools
          2. 10.2.1.2.2  Choosing the Switching Frequency
          3. 10.2.1.2.3  Setting the Output Voltage
          4. 10.2.1.2.4  Inductor Selection
          5. 10.2.1.2.5  Output Capacitor Selection
          6. 10.2.1.2.6  Input Capacitor Selection
          7. 10.2.1.2.7  CBOOT
          8. 10.2.1.2.8  VCC
          9. 10.2.1.2.9  CFF Selection
            1. 10.2.1.2.9.1 External UVLO
          10. 10.2.1.2.10 Maximum Ambient Temperature
      2. 10.2.2 Application Curves
      3. 10.2.3 Design 2: High Density 24-V, 1.5-A FPWM Converter
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedure
        3. 10.2.3.3 Application Curves
    3. 10.3 What to Do and What Not to Do
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ground and Thermal Considerations
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Development Support
        1. 13.1.1.1 Custom Design With WEBENCH® Tools
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.5 Electrical Characteristics

Limits apply over operating junction temperature (TJ ) range of –40°C to +150°C, unless otherwise stated. Minimum and Maximum limits(1) are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 24 V.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY VOLTAGE (VIN PIN)
IQ-nonSWOperating quiescent current (non-switching)(2)VEN = 3.3 V (PFM variant only)182636µA
ISDShutdown quiescent current; measured at VIN pinVEN = 0 V5µA
ENABLE (EN PIN)
VEN-VCC-HEnable input high level for VCC outputVENABLE rising1.14V
VEN-VCC-LEnable input low level for VCC outputVENABLE falling0.3V
VEN-VOUT-HEnable input high level for VOUTVENABLE rising1.1571.2311.3V
VEN-VOUT-HYSEnable input hysteresis for VOUTHysteresis below VENABLE-H; falling110mV
ILKG-ENEnable input leakage currentVEN = 3.3V0.2nA
INTERNAL LDO (VCC PIN)
VCCInternal VCC voltage6 V ≤ VIN ≤ 60 V4.7555.25V
VCC-UVLO-RisingInternal VCC undervoltage lockoutVCC rising3.63.84.0V
VCC-UVLO-FallingInternal VCC undervoltage lockoutVCC falling3.13.33.5V
VOLTAGE REFERENCE (FB PIN)
VFBFeedback voltage0.98511.015V
ILKG-FBFeedback leakage currentFB = 1 V0.2nA
CURRENT LIMITS AND HICCUP
ISCHigh-side current limit(3)22.42.8A
ILS-LIMITLow-side current limit(3)1.551.82.07A
IL-ZCZero cross detector thresholdPFM variants only0.02A
IPEAK-MINMinimum inductor peak current(3)0.45A
IL-NEGNegative current limit(3)FPWM variant only–1.8–1.4–0.9A
POWER GOOD (PGOOD PIN)
VPG-HIGH-UPPower-Good upper threshold - rising% of FB voltage105%107%110%
VPG-LOW-DNPower-Good lower threshold - falling% of FB voltage90%93%95%
VPG-HYSPower-Good hysteresis (rising & falling)% of FB voltage2%
TPGPower-Good rising/falling edge deglitch delay80140200µs
VPG-VALIDMinimum input voltage for proper Power-Good function2V
RPGPower-Good on-resistanceVEN = 2.5 V80165Ω
RPGPower-Good on-resistanceVEN = 0 V3590Ω
OSCILLATOR
FOSCInternal oscillator frequency1-MHz variant0.8511.15MHz
FOSCInternal oscillator frequency400-kHz variant340400460kHz
MOSFETS
RDS-ON-HSHigh-side MOSFET ON-resistanceIOUT = 0.5 A225435mΩ
RDS-ON-LSLow-side MOSFET ON-resistanceIOUT = 0.5 A150280mΩ
(1) MIN and MAX limits are 100% production tested at 25℃. Limits over the operating temperature range verified through correlation using
Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(3) The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application.