JAJSKJ2A June   2022  – November 2022 LMR51430

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Fixed Frequency Peak Current Mode Control
      2. 8.3.2 Adjustable Output Voltage
      3. 8.3.3 Enable
      4. 8.3.4 Minimum On Time, Minimum Off Time, and Frequency Foldback
      5. 8.3.5 Bootstrap Voltage
      6. 8.3.6 Overcurrent and Short-Circuit Protection
      7. 8.3.7 Soft Start
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Active Mode
      3. 8.4.3 CCM Mode
      4. 8.4.4 Light-Load Operation (PFM Version)
      5. 8.4.5 Light-Load Operation (FPWM Version)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Output Voltage Set-Point
        3. 9.2.2.3 Switching Frequency
        4. 9.2.2.4 Inductor Selection
        5. 9.2.2.5 Output Capacitor Selection
        6. 9.2.2.6 Input Capacitor Selection
        7. 9.2.2.7 Bootstrap Capacitor
        8. 9.2.2.8 Undervoltage Lockout Set-Point
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Compact Layout for EMI Reduction
        2. 9.4.1.2 Feedback Resistors
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics

Limits apply over operating junction temperature (TJ) range of –40°C to +150°C, unless otherwise stated. Minimum and maximum limits(1) are specified through test, design or statistical correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless otherwise stated, the following conditions apply: VIN = 4.5 V to 36 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ(VIN) VIN quiescent current (non-switching)(2) VEN = 3 V, PFM variant only 40 65 µA
ISD(VIN) VIN shutdown supply current VEN = 0 V 3 15 µA
UVLO
VINUVLO(R) VIN UVLO rising threshold VIN rising 3.89 4.5 V
VINUVLO(F) VIN UVLO falling threshold VIN falling 3.35 3.58 V
VINUVLO(H) VIN UVLO hysteresis 0.3 V
ENABLE
VEN(R) EN voltage rising threshold EN rising, enable switching 1.1 1.227 1.36 V
VEN(F) EN voltage falling threshold EN falling, disable switching 0.95 1.08 1.22 V
IEN(P2) EN pin sourcing current post EN rising threshold VEN = 3 V 10 200 nA
REFERENCE VOLTAGE
Vfb Reference voltage 0.591 0.6 0.609 V
IFB(LKG) FB input leakage current VFB = 1.2 V 0.8 50 nA
SWITCHING FREQUENCY
fSW1(CCM) Switching frequency, CCM operation 500-kHz trim option 450 500 560 kHz
fSW2(CCM) Switching frequency, CCM operation 1.1-MHz trim option 0.95 1.1 1.25 MHz
STARTUP
tSS Internal fixed soft-start time 3.2 4.0 5.4 ms
POWER STAGE
RDSON(HS) High-side MOSFET on-resistance TJ = 25℃ 0.12 Ω
RDSON(LS) Low-side MOSFET on-resistance TJ = 25℃ 0.07 Ω
tON(min) Minimum ON pulse width VIN = 12 V, IOUT = 3 A 70 ns
tON(max) Maximum ON pulse width VIN = 12 V, IOUT = 3 A 6.76 µs
tOFF(min) Minimum OFF pulse width VIN = 4.5 V 150 ns
OVERCURRENT PROTECTION
IHS_PK(OC) High-side peak current limit(3) LM51430 3.67 4.76 6.68 A
ILS_V(OC) Low-side valley current limit(3) LM51430 2.75 3.5 4.2 A
ILS(NOC) Low-side negative current limit LM51430 FPWM Only –1.6 A
IZC Zero-cross detection current threshold 0.02 A
THERMAL SHUTDOWN
TJ(SD) Thermal shutdown threshold(4) Temperature rising 163 °C
TJ(HYS) Thermal shutdown hysteresis(4) 22 °C
(1) MIN and MAX limits are 100% production tested at 25℃. Limits over the operating temperature range verified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) This is the current used by the device open loop. It does not represent the total input current of the system when in regulation.
(3) The current limit values in this table are tested, open loop, in production. They may differ from those found in a closed loop application
(4) Specified by design