JAJSCZ0 February   2017 LMV551-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: 3 V
    6. 6.6 Electrical Characteristics: 5 V
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Voltage and Low Power Operation
      2. 7.3.2 Wide Bandwidth
      3. 7.3.3 Low Input Referred Noise
      4. 7.3.4 Ground Sensing and Rail-to-Rail Output
      5. 7.3.5 Small Size
    4. 7.4 Device Functional Modes
      1. 7.4.1 Stability Of Op Amp Circuits
        1. 7.4.1.1 Stability and Capacitive Loading
          1. 7.4.1.1.1 In the Loop Compensation
          2. 7.4.1.1.2 Compensation by External Resistor
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Dos and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7 Detailed Description

7.1 Overview

The LMV551-Q1 is a high performance, low power operational amplifiers implemented with TI’s advanced VIP50 process. The LMV551-Q1 features 3 MHz of bandwidth while consuming only 37 µA of current, which is an exceptional bandwidth to power ratio in this op amp class. This amplifier is unity gain stable and provide an excellent solution for low power applications requiring a wide bandwidth.

7.2 Functional Block Diagram

LMV551-Q1 Op_Amp_Triangle_Block_Diagram.gif

7.3 Feature Description

The differential inputs of the amplifier consist of a noninverting input (+IN) and an inverting input (–IN). The amplifier amplifies only the difference in voltage between the two inputs, which is called the differential input voltage. The output voltage of the op-amp VOUT is given by Equation 1:

Equation 1. VOUT = AOL (IN+– IN–)

where

  • AOL is the open-loop gain of the amplifier, typically around 100 dB (100,000x, or 10 μV per volt).

7.3.1 Low Voltage and Low Power Operation

The LMV551-Q1 has performance ensured at supply voltages of 3 V and 5 V and are ensured to be operational at all supply voltages from 2.7 V to 5.5 V. For this supply voltage range, the LMV551-Q1 draw the extremely low supply current of less than 37 μA.

7.3.2 Wide Bandwidth

The bandwidth to power ratio of 3 MHz to 37 μA per amplifier is one of the best bandwidth to power ratios ever achieved. This makes these devices ideal for low power signal processing applications such as portable media players and instrumentation.

7.3.3 Low Input Referred Noise

The LMV551-Q1 provides a flatband input referred voltage noise density of 70 nV/√Hz , which is significantly better than the noise performance expected from an ultra low power op amp. They also feature the exceptionally low 1/f noise corner frequency of 4 Hz. This noise specification makes the LMV551-Q1 ideal for low power applications such as mobile devices and portable sensors.

7.3.4 Ground Sensing and Rail-to-Rail Output

The LMV551-Q1 has a rail-to-rail output stage, which provides the maximum possible output dynamic range. This is especially important for applications requiring a large output swing. The input common mode range includes the negative supply rail which allows direct sensing at ground in a single supply operation.

7.3.5 Small Size

The small footprint of the DCK (SC-70) package saves space on printed circuit boards, and enable the design of smaller and more compact electronic products. Long traces between the signal source and the op amp make the signal path susceptible to noise. By using a physically smaller package, the amplifier can be placed closer to the signal source, reducing noise pickup and enhancing signal integrity.

7.4 Device Functional Modes

7.4.1 Stability Of Op Amp Circuits

7.4.1.1 Stability and Capacitive Loading

As seen inFigure 26, the phase margin reduces significantly for CL greater than 100 pF. This is because the op amp is designed to provide the maximum bandwidth possible for a low supply current. Stabilizing the amplifier for higher capacitive loads would have required either a drastic increase in supply current, or a large internal compensation capacitance, which would have reduced the bandwidth of the op amp. When the LMV551-Q1 is to be used for driving higher capacitive loads, it must be externally compensated.

LMV551-Q1 20152603.gif Figure 26. Gain vs Frequency for an Op Amp

An op amp, ideally, has a dominant pole close to DC, which causes its gain to decay at the rate of 20 dB/decade with respect to frequency. If this rate of decay, also known as the rate of closure (ROC), remains the same until the op amp’s unity gain bandwidth crosses zero, the op amp is stable. If, however, a large capacitance is added to the output of the op amp, it combines with the output impedance of the op amp to create another pole in its frequency response before its unity gain frequency (Figure 26). This increases the ROC to 40 dB/ decade and causes instability.

In such a case a number of techniques can be used to restore stability to the circuit. The idea behind all these schemes is to modify the frequency response such that it can be restored to an ROC of 20 dB/decade, which ensures stability.

7.4.1.1.1 In the Loop Compensation

Figure 27 illustrates a compensation technique, known as in the loop compensation, that employs an RC feedback circuit within the feedback loop to stabilize a non-inverting amplifier configuration. A small series resistance, RS, is used to isolate the amplifier output from the load capacitance, CL, and a small capacitance, CF, is inserted across the feedback resistor to bypass CL at higher frequencies.

LMV551-Q1 20152604.gif Figure 27. In the Loop Compensation

The values for RS and CF are decided by ensuring that the zero attributed to CF lies at the same frequency as the pole attributed to CL. This ensures that the effect of the second pole on the transfer function is compensated for by the presence of the zero, and that the ROC is maintained at 20 dB/decade. For the circuit shown in Figure 27 the values of RS and CF are given by Equation 3. Values of RS and CF required for maintaining stability for different values of CL, as well as the phase margins obtained, are shown in Table 1. RF, RIN, and RL are to be 10 kΩ, while ROUT is 340 Ω.

Equation 2. LMV551-Q1 eq-01a-SNOSD24.gif
Equation 3. LMV551-Q1 eq-01b-SNOSD24.gif

Table 1. Phase Margins

CL (pF) RS (Ω) CF (pF) PHASE MARGIN (°)
50 340 8 47
100 340 15 42
150 340 22 40

Although this methodology provides circuit stability for any load capacitance, it does so at the price of bandwidth. The closed loop bandwidth of the circuit is now limited by RF and CF.

7.4.1.1.2 Compensation by External Resistor

In some applications it is essential to drive a capacitive load without sacrificing bandwidth. In such a case, in the loop compensation is not viable. A simpler scheme for compensation is shown in Figure 28. A resistor, RISO, is placed in series between the load capacitance and the output. This introduces a zero in the circuit transfer function, which counteracts the effect of the pole formed by the load capacitance and ensures stability. Consider the size of CL and the level of performance desired to determine the value of RISO. Values ranging from 5 Ω to 50 Ω are usually sufficient to ensure stability. A larger value of RISO results in a system with less ringing and overshoot, but also limits the output swing and the short-circuit current of the circuit.

LMV551-Q1 20152612.gif Figure 28. Compensation by Isolation Resistor