SNAS850 December 2024 LMX1205
ADVANCE INFORMATION
For optimal phase noise, the VCO in the multiplier divides up the frequency range into many different bands and cores and has optimized amplitude settings for each band and core. For this reason, upon initial use or whenever the frequency is changed, the user must run a calibration routine to determine the correct core, frequency band, and amplitude setting. Program the R0 register with a valid input signal to perform a calibration. To provide reliable multiplier calibration, the state machine clock frequency must be at least twice the SPI write speed, but no more than 30MHz. Whenever the CLK_MUX mode is changed or the multiplier is calibrated for the first time, the calibration time is substantially longer, on the order of 5ms.