JAJSN48B October 2021 – June 2022 LMX2571-EP
PRODUCTION DATA
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | FSK_EN_F2 | EXTVCO_CHDIV_F2 | EXTVCO_SEL_F2 | OUTBUF_TX_PWR_F2 | |||||||
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-10h |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
BIT | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
15-11 | R/W | 0h | Program 0h to this field. | |
10 | FSK_EN_F2 | R/W | 0h | Enables FSK
operation in all FSK operation modes. When this bit is set,
fractional denominator DEN should be zero. See Section 8.1.1 for details. |
9-6 | EXTVCO_CHDIV_F2 | R/W | 0h | Set the value of
the output channel divider, CHDIV3, when using external VCO in
PLL mode. |
5 | EXTVCO_SEL_F2 | R/W | 0h | Selects
synthesizer mode (internal VCO) or PLL mode (external VCO)
operation. |
4-0 | OUTBUF_TX_PWR_F2 | R/W | 10h | Set the output power at RFoutTx port. See Section 8.1.7 for details. |