LMX2571 Low-Power, High-Performance PLLatinum RF Synthesizer with FSK Modulation
- SNAS654A March 2015 – July 2016 LMX2571
  
  PRODUCTION DATA.

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DATA SHEET

LMX2571 Low-Power, High-Performance PLLatinum RF Synthesizer with FSK Modulation

1 Features

Any Frequency from 10 MHz to 1344 MHz
Low Phase Noise and Spurs
- –123 dBc/Hz at 12.5 kHz Offset at 480 MHz
- –145 dBc/Hz at 1 MHz Offset at 480 MHz
- Normalized PLL Noise Floor of –231 dBc/Hz
- Spurious Better Than –75 dBc/Hz
New FastLock to Reduce Lock Time
A Novel Technique to Remove Integer Boundary Spurs
Integrated 5-V Charge Pump and Output Divider for External VCO Operation
2-, 4- and 8-Level or Arbitrary Level Direct Digital FSK Modulation
One TX/RX Output or Two Fanout Outputs
Crystal, XO or Differential Reference Clock Input
Low Current Consumption
- 39-mA Typical Synthesizer Mode (Internal VCO)
- 9-mA Typical PLL Mode (External VCO)
24-Bit Fractional-N Delta Sigma Modulator

2 Applications

Duplex Mode Digital Professional 2-Way Radio
- dPMR, DMR, PDT, P25 Phase I
Low Power Radio Communication Systems
- Satcom Modem
- Wireless Microphone
- Propriety Wireless Connectivity
Handheld Test and Measurement Equipment

3 Description

The LMX2571 is a low-power, high-performance, wideband PLLatinum™ RF synthesizer that integrates a delta-sigma fractional N PLL, multiple core voltage-controlled oscillator (VCO), programmable output dividers and two output buffers. The VCO cores work up to 5.376 GHz resulting in continuous output frequency range of 10 MHz to 1344 MHz.

This synthesizer can also be used with an external VCO. To that end, a dedicated 5-V charge pump and an output divider are available for this configuration.

A unique programmable multiplier is also incorporated to help improve spurs, allowing the system to use every channel even if it falls on an integer boundary.

The output has an integrated SPDT switch that can be used as a transmit/receive switch in FDD radio application. Both outputs can also be turned on to provide 2 outputs at the same time.

The LMX2571 supports direct digital FSK modulation through programming or pins. Discrete level FSK, pulse shaping FSK, and analog FM modulation are supported.

A new FastLock technique can be used allowing the user to step from one frequency to the next in less than 1.5 ms even when an external VCO is used with a narrow band loop filter.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
LMX2571	WQFN (36)	6.00 mm × 6.00 mm

For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Schematic

4 Revision History

Changes from * Revision (March 2015) to A Revision

Updated frequency for external VCO Mode. Go

5 Pin Configuration and Functions

NJK Package

36-Pin WQFN

Top View

Pin Functions

PIN		TYPE	DESCRIPTION
NAME	NO.	TYPE	DESCRIPTION
Bypass1	2	Bypass	Place a 100-nF capacitor to GND.
Bypass2	3	Bypass	Place a 100-nF capacitor to GND.
CE	19	Input	Chip Enable input. Active HIGH powers on the device.
CLK	11	Input	MICROWIRE clock input.
CPout	25	Output	Internal VCO charge pump access point to connect to a 2^nd order loop filter.
CPoutExt	30	Output	5-V charge pump output used in PLL mode (external VCO).
DAP	0	GND	The DAP should be grounded.
DATA	12	Input	MICROWIRE serial data input.
Fin	24	Input	High frequency AC coupled input pin for an external VCO. Leave it open or AC coupled to GND if not being used.
FSK_D0	7	Input	FSK data bit 0 (FSK PIN mode) / I2S FS input (FSK I2S mode).
FSK_D1	6	Input	FSK data bit 1 (FSK PIN mode) / I2S DATA input (FSK I2S mode).
FSK_D2	5	Input	FSK data bit 2 (FSK PIN mode).
FSK_DV	4	Input	FSK data valid input (FSK PIN mode) / I2S CLK input (FSK I2S mode).
FLout1	29	Output	FastLock output control 1 for external switch. Output is HIGH when F1 is selected.
FLout2	28	Output	FastLock output control 2 for external switch. Output is HIGH when F2 is selected.
GND	23	GND	VCO ground.
GND	31	GND	Charge pump ground.
GND	35	GND	OSCin ground.
LE	13	Input	MICROWIRE latch enable input.
MUXout	10	Output	Multiplexed output that can be assigned to lock detect or readback serial data output.
NC	8,14, 26	NC	Do not connect these pins.
OSCin	34	Input	Reference clock input.
OSCin*	36	Input	Complementary reference clock input.
RFoutRx	16	Output	RF output used to drive receive mixer. Selectable open drain or push-pull output.
RFoutTx	17	Output	RF output used to drive transmit signal. Selectable open drain or push-pull output.
TrCtl	18	Input	Transmit/Receive control. This pin controls the RF output port and the output frequency selection.
Vcc3p3	1, 9, 20, 27	Supply	Connect to 3.3-V supply.
VccIO	15, 33	Supply	Supply for digital logic interface. Connect to 3.3-V supply.
VcpExt	32	Supply	Supply for 5-V charge pump. Connect to 5-V supply in PLL mode. Connect to either 3.3-V or 5-V supply in synthesizer mode.
VrefVCO	22	Bypass	LDO output. Place a 100-nF capacitor to GND.
VregVCO	21	Bypass	Bias circuitry for the VCO. Place a 2.2-µF capacitor to GND.