JAJSFI5 May 2018 LMX2572LP
PRODUCTION DATA.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LD_DLY | |||||||||||||||
R/W-3E8h |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15 - 0 | LD_DLY | R/W | 3E8h | For the VCOCal lock detect, this is the delay in ¼ fPD cycles that is added after the calibration is finished before the VCOCal lock detect is asserted HIGH. |