JAJSM75G
December 2015 – August 2022
LMX2592
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Functional Description
7.3.1
Input Signal
7.3.2
Input Signal Path
7.3.3
PLL Phase Detector and Charge Pump
7.3.4
N Divider and Fractional Circuitry
7.3.5
Voltage Controlled Oscillator
7.3.6
VCO Calibration
7.3.7
VCO Doubler
7.3.8
Channel Divider
7.3.9
Output Distribution
7.3.10
Output Buffer
7.3.11
Phase Adjust
7.4
Device Functional Modes
7.4.1
Power Down
7.4.2
Lock Detect
7.4.3
Register Readback
7.5
Programming
7.5.1
Recommended Initial Power on Programming Sequence
7.5.2
Recommended Sequence for Changing Frequencies
7.6
Register Maps
7.6.1
LMX2592 Register Map – Default Values
7.6.1.1
Register Descriptions
8
Application and Implementation
8.1
Application Information
8.1.1
Optimization of Spurs
8.1.1.1
Understanding Spurs by Offsets
8.1.1.2
Spur Mitigation Techniques
8.1.2
Configuring the Input Signal Path
8.1.2.1
Input Signal Noise Scaling
8.1.3
Input Pin Configuration
8.1.4
Using the OSCin Doubler
8.1.5
Using the Input Signal Path Components
8.1.5.1
Moving Phase Detector Frequency
8.1.5.2
Multiplying and Dividing by the Same Value
8.1.6
Designing for Output Power
8.1.7
Current Consumption Management
8.1.8
Decreasing Lock Time
8.1.9
Modeling and Understanding PLL FOM and Flicker Noise
8.1.10
External Loop Filter
8.2
Typical Application
8.2.1
Design for Low Jitter
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
サポート・リソース
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
RHA|40
サーマルパッド・メカニカル・データ
RHA|40
QFND114P
発注情報
jajsm75g_oa
jajsm75g_pm
6.3
Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
V
CC
Power supply voltage
3.15
3.45
V
T
A
Ambient temperature
–40
85
°C
T
J
Junction temperature
125
°C