7.6.21 R70 Register (Address = 0x46) [reset = 0xC350]
R70 is shown in Figure 72 and described in Table 29.
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Figure 72. R70 Register
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
MASH_RST_COUNT |
R/W-0xC350 |
|
Table 29. R70 Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
15-0 |
MASH_RST_COUNT |
R/W |
0xC350 |
When using a fractional N value with PLL_PHASE_SYNC=1, this is used to set a delay to allow the SYNC to work properly. In general, it should be set to a count equal to 4X the analog settling time of the PLL. (LSB) |