JAJSFZ2E August   2012  – September 2021 LMZ20501

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Nano Scale Package
      2. 7.3.2 Internal Synchronous Rectifier
      3. 7.3.3 Current Limit Protection
      4. 7.3.4 Start-Up
      5. 7.3.5 Dropout Behavior
      6. 7.3.6 Power Good Flag Function
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Operation
      2. 7.4.2 PFM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 Setting The Output Voltage
        3. 8.2.1.3 Output and Feedforward Capacitors
        4. 8.2.1.4 Input Capacitors
        5. 8.2.1.5 Maximum Ambient Temperature
        6. 8.2.1.6 Options
      2. 8.2.2 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Soldering Information
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • SIL|8
サーマルパッド・メカニカル・データ
発注情報

10.1 Layout Guidelines

The PCB layout of any DC-DC converter is critical to the optimal performance of the design. Bad PCB layout can disrupt the operation of an otherwise good schematic design. Even if the converter regulates correctly, bad PCB layout can mean the difference between a robust design and one that cannot be mass produced. Furthermore, the EMI performance of the regulator is dependent on the PCB layout, to a great extent. In a buck converter, the most critical PCB feature is the loop formed by the input capacitor and the module ground, as shown in Figure 10-1. This loop carries fast transient currents that can cause large transient voltages when reacting with the trace inductance. These unwanted transient voltages will disrupt the proper operation of the converter. Because of this, the traces in this loop should be wide and short, and the loop area as small as possible to reduce the parasitic inductance. Figure 10-2 shows a recommended layout for the critical components of the LMZ20501; the top side metal is shown in red. This PCB layout is a good guide for any specific application. The following important guidelines should also be followed:

  1. Place the input capacitor CIN as close as possible to the VIN and GND terminals. VIN (pin 8) and GND (pin 6) are on the same side of the module, simplifying the input capacitor placement.
  2. Place the feedback divider as close as possible to the FB pin on the module. The divider and CFF should be close to the module, while the length of the trace from VOUT to the divider can be somewhat longer. However, this latter trace should not be routed near any noise sources that can capacitively couple to the FB input.
  3. Connect the EP pad to the GND plane. This pad acts as a heat-sink connection and a ground connection for the module. It must be solidly connected to a ground plane. The integrity of this connection has a direct bearing on the effective RθJA.
  4. Provide enough PCB area for proper heat-sinking. As stated in Section 8.2.1.5, enough copper area must be used to provide a low RθJA, commensurate with the maximum load current and ambient temperature. The top and bottom PCB layers should be made with two ounce copper; and no less than one ounce.
  5. The resources in Table 11-2 provide additional important guidelines.
    GUID-2AE32BFE-65DE-46DF-A837-8F6FA5B0A17F-low.gif Figure 10-1 Current Loops With Fast Transient Currents