JAJSFZ2E August   2012  – September 2021 LMZ20501

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 System Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Nano Scale Package
      2. 7.3.2 Internal Synchronous Rectifier
      3. 7.3.3 Current Limit Protection
      4. 7.3.4 Start-Up
      5. 7.3.5 Dropout Behavior
      6. 7.3.6 Power Good Flag Function
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 PWM Operation
      2. 7.4.2 PFM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Custom Design With WEBENCH® Tools
        2. 8.2.1.2 Setting The Output Voltage
        3. 8.2.1.3 Output and Feedforward Capacitors
        4. 8.2.1.4 Input Capacitors
        5. 8.2.1.5 Maximum Ambient Temperature
        6. 8.2.1.6 Options
      2. 8.2.2 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Soldering Information
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
  • SIL|8
サーマルパッド・メカニカル・データ
発注情報

7.4.1 PWM Operation

In forced PWM mode, the converter operates as a constant frequency voltage mode regulator with input voltage feedforward. This provides excellent line and load regulation and low output voltage ripple. This operation is maintained, even at no-load, by allowing the inductor current to reverse its normal direction. While in PWM mode, the output voltage is regulated by switching at a constant frequency and modulating the duty cycle to control the power to the load. This mode trades off reduced light load efficiency for low output voltage ripple and constant switching frequency. In this mode, a negative current limit of approximately 750 mA is imposed to prevent damage to the regulator power FETs.