JAJS850O March   2000  – December 2023 LP2981-N

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable
      2. 6.3.2 Dropout Voltage
      3. 6.3.3 Current Limit
      4. 6.3.4 Undervoltage Lockout (UVLO)
      5. 6.3.5 Thermal Shutdown
      6. 6.3.6 Output Pulldown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Device Functional Mode Comparison
      2. 6.4.2 Normal Operation
      3. 6.4.3 Dropout Operation
      4. 6.4.4 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Recommended Capacitor Types
        1. 7.1.1.1 Recommended Capacitors for the Legacy Chip
        2. 7.1.1.2 Recommended Capacitors for the New Chip
      2. 7.1.2 Input and Output Capacitor Requirements
      3. 7.1.3 Estimating Junction Temperature
      4. 7.1.4 Power Dissipation (PD)
      5. 7.1.5 Reverse Current
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 ON and OFF Input Operation
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Nomenclature
    2. 10.2 サード・パーティ製品に関する免責事項
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Related Documentation
    5. 10.5 サポート・リソース
    6. 10.6 Trademarks
    7. 10.7 静電気放電に関する注意事項
    8. 10.8 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.2.1 ON and OFF Input Operation

The LP2981-N is shut off by pulling the ON/ OFF input low, and turned on by driving the input high. If this feature is not to be used, the ON/OFF input is required to be tied to VIN to keep the regulator on at all times (the ON/ OFF input must not be left floating).

For proper operation of the LDO, the signal source used to drive the ON/ OFF input must be able to swing above and below the specified turnon/turnoff voltage thresholds which specify an ON or OFF state (see Section 5.5).

The ON/ OFF signal can come from either a totem-pole output, or an open-collector output with pullup resistor to the LP2981-N input voltage or another logic supply. The high-level voltage can exceed the LP2981-N input voltage, but must remain within the Section 5.1 for the ON/ OFF pin.

For the legacy chip only, it is also important that the turnon/turnoff voltage signals applied to the ON/ OFF input have a slew rate which is greater than 40 mV/μs.