Table 1. Design Parameters

8.2.2.1 External Capacitors

The LP38500-ADJ and LP38502-ADJ require that at least 10-µF (±20%) capacitors be used at the input and output pins located within one cm of the device. Larger capacitors may be used without limit on size for both C_IN and C_OUT. Capacitor tolerances such as temperature variation and voltage loading effects must be considered when selecting capacitors to ensure that they will provide the minimum required amount of capacitance under all operating conditions for the application.

In general, ceramic capacitors are best for noise bypassing and transient response because of their ultra low ESR. It must be noted that if ceramics are used, only the types with X5R or X7R dielectric ratings should be used (never Z5U or Y5F). Capacitors which have the Z5U or Y5F characteristics will see a drop in capacitance of as much as 50% if their temperature increases from 25°C to 85°C. In addition, the capacitance drops significantly with applied voltage: a typical Z5U or Y5F capacitor can lose as much as 60% of its rated capacitance if only half of the rated voltage is applied to it. For these reasons, only X5R and X7R ceramics should be used.

8.2.2.2 Input Capacitor

All linear regulators can be affected by the source impedance of the voltage which is connected to the input. If the source impedance is too high, the reactive component of the source may affect the control loop’s phase margin. To ensure proper loop operation, the ESR of the capacitor used for C_IN must not exceed 0.5 Ω. Any good quality ceramic capacitor will meet this requirement, as well as many good quality tantalums. Aluminum electrolytic capacitors may also work, but can possibly have an ESR which increases significantly at cold temperatures. If the ESR of the input capacitor may exceed 0.5 Ω, it is recommended that a 2.2-µF ceramic capacitor be used in parallel, as this will assure stable loop operation.

8.2.2.3 Output Capacitor

Any type of capacitor may be used for C_OUT, with no limitations on minimum or maximum ESR, as long as the minimum amount of capacitance is present. The amount of capacitance can be increased without limit. Increasing the size of C_OUT typically will give improved load transient response.

8.2.2.4 Setting The Output Voltage

The output voltage of the LP38500/2-ADJ can be set to any value between 0.6V and 5V using two external resistors shown as R1 and R2 in Figure 19.

Figure 19. Setting Output Voltage

The value of R2 should always be less than or equal to 10 kΩ for good loop compensation. R1 can be selected for a given V_OUT using the following formula:

8.2.2.5 RFI/EMI Susceptibility

Radio Frequency Interference (RFI) and Electro-Magnetic Interference (EMI) can degrade any integrated circuit's performance because of the small dimensions of the geometries inside the device. In applications where circuit sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must be taken to ensure that this does not affect the device regulator.

If RFI/EMI noise is present on the input side of the regulator (such as applications where the input source comes from the output of a switching regulator), good ceramic bypass capacitors must be used at the input pin of the device to reduce the amount of EMI conducted into the device.

If the LP38500, LP38502-ADJ output is connected to a load which switches at high speed (such as a clock), the high-frequency current pulses required by the load must be supplied by the capacitors on the device output. Since the bandwidth of the regulator loop is less than 300 kHz, the control circuitry cannot respond to load changes above that frequency. This means the effective output impedance of the device at frequencies above 300 kHz is determined only by the output capacitor(s). Ceramic capacitors provide the best performance in this type of application.

In applications where the load is switching at high speed, the output of the device may need RF isolation from the load. In such cases, it is recommended that some inductance be placed between the output capacitor and the load, and good RF bypass capacitors be placed directly across the load. PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces. Noisy circuitry should be isolated from clean circuits where possible, and grounded through a separate path. At MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the ground plane. In multi-layer PC Board applications, care should be taken in layout so that noisy power and ground planes do not radiate directly into adjacent layers which carry analog power and ground.

8.2.2.6 Output Noise

Noise is specified in two ways:

• Spot noise or output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1-Hz bandwidth). This type of noise is usually plotted on a curve as a function of frequency.
• Total output noise or broadband noise is the RMS sum of spot noise over a specified bandwidth, usually several decades of frequencies.

Spot noise is measured in units µV/√Hz or nV/√Hz and total output noise is measured in µ_V(rms). The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a low-frequency component and a high frequency component, which depend strongly on the silicon area and quiescent current.

Noise can generally be reduced in two ways: increase the transistor area or increase the reference current. However, enlarging the transistors will increase die size, and increasing the reference current means higher total supply current (ground pin current).