SNVS539H November   2007  – September 2015 LP38500-ADJ , LP38502-ADJ

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Stability And Phase Margin
      2. 7.3.2 Load Transient Response
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Reverse Current Path
    4. 7.4 Device Functional Modes
      1. 7.4.1 Short-Circuit Protection
      2. 7.4.2 Enable Operation (LP38502-ADJ Only)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Capacitors
        2. 8.2.2.2 Input Capacitor
        3. 8.2.2.3 Output Capacitor
        4. 8.2.2.4 Setting The Output Voltage
        5. 8.2.2.5 RFI/EMI Susceptibility
        6. 8.2.2.6 Output Noise
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation/Heatsinking
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Printed Circuit Board Layout
    2. 10.2 Layout Examples
      1. 10.2.1 Heatsinking WSON Package
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
      2. 11.1.2 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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9 Power Supply Recommendations

The LP38500-ADJ and LP38502-ADJ devices are designed to operate from an input voltage supply range between 2.7 V and 5.5 V. The input voltage range provides adequate headroom in order for the device to have a regulated output. This input supply must be well regulated. An input capacitor of at least 10 μF is required.

9.1 Power Dissipation/Heatsinking

The maximum power dissipation (PD(MAX)) of the LP38500-ADJ and LP38502-ADJ is limited by the maximum junction temperature of 125°C, along with the maximum ambient temperature (TA(MAX)) of the application, and the thermal resistance (RθJA) of the package. Under all possible conditions, the junction temperature (TJ) must be within the range specified in the Recommended Operating Conditions. The total power dissipation of the device is given by:

Equation 3. PD = ((VIN − VOUT) × IOUT) + (VIN × IGND)

where

The maximum allowable junction temperature rise (ΔTJ) depends on the maximum expected ambient temperature (TA(MAX)) of the application, and the maximum allowable junction temperature (TJ(MAX)):

Equation 4. ΔTJ = TJ(MAX)− TA(MAX)

The maximum allowable value for junction-to-ambient thermal resistance, RθJA, can be calculated using the formula:

Equation 5. RθJA = ΔTJ / PD(MAX)

The LP38500-ADJ and LP38502-ADJ are available in the DDPAK/TO-263, TO-263, and WSON packages. The thermal resistance depends on the amount of copper area allocated to heat transfer.