SNOSCT6F March   2013  – January 2017 LP38798

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Noise Filter
      2. 7.3.2 Enable Input Operation
      3. 7.3.3 Undervoltage Lockout (UVLO)
      4. 7.3.4 Output Current Limiting
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Programming the Output Voltage
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application: VOUT = 5 V
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Input Capacitor Recommendations
        3. 8.2.2.3 Output Capacitor Recommendations
        4. 8.2.2.4 Charge Pump
        5. 8.2.2.5 Setting the Output Voltage
        6. 8.2.2.6 Device Dissipation
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
    4. 10.4 Estimating the Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Suppport
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Wide Operating Input Voltage Range:
    3 V to 20 V
  • Ultra-Low Output Noise: 5 µVRMS
    (10 Hz to 100 kHz)
  • High PSRR: 90 dB at 10 kHz, 60 dB at 100 kHz
  • ±1% Output Voltage Initial Accuracy (TJ = 25°C)
  • Very Low Dropout: 200 mV (Typical) at 800 mA
  • Stable with Ceramic or Tantalum Output Capacitors
  • Excellent Line and Load Transient Response
  • Current Limit and Overtemperature Protection
  • Create a Custom Design Using the LP38798 With the WEBENCH® Power Designer

2 Applications

  • RF Power Supplies: PLLs, VCOs, Mixers, LNAs
  • Telecom Infrastructure
  • Wireless Infrastructure
  • Very Low-Noise Instrumentation
  • Precision Power Supplies
  • High-Speed, High-Precision Data Converters

3 Description

The LP38798-ADJ is a high-performance, low-noise LDO that can supply up to 800 mA output current. Designed to meet the requirements of sensitive RF/Analog circuitry, the LP38798-ADJ implements a novel linear topology on an advanced CMOS process to deliver ultra-low output noise and high PSRR at switching power supply frequencies. The LP38798SD-ADJ is stable with both ceramic and tantalum output capacitors and requires a minimum output capacitance of only 1 µF for stability.

The LP38798-ADJ can operate over a wide input voltage range (3 V to 20 V) making it well suited for many post-regulation applications.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
LP38798 WSON (12) 4.00 mm × 4.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

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Simplified Schematic

LP38798 30204201.gif