JAJSTC8A February 2024 – April 2024 LP5867
PRODUCTION DATA
The address and data bits are transmitted MSB first with 8-bits length format in each cycle. Each transmission is started with Address Byte 1, which contains 8 higher bits of the register address. The Address Byte 2 is started with 2 lower bits of the register address and 1 read/write bit. The auto-increment feature allows writing / reading several consecutive registers within one transmission. If not consecutive, a new transmission must be started.
Address Byte1 | Register Address | |||||||
---|---|---|---|---|---|---|---|---|
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 | |
9th bit | 8th bit | 7th bit | 6th bit | 5th bit | 4th bit | 3th bit | 2th bit | |
Address Byte2 | Register Address | |||||||
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 | |
1th bit | 0th bit | R: 0 W: 1 | Don't Care |