JAJSP11A August 2022 – December 2022 LP5891-Q1
PRODUCTION DATA
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Some bits of FC0, FC1, FC2, FC3 registers must be configured properly before the devices work normally. In this application, the registers value can be:
FC Registers | Register Value(BIN) | Register Value(HEX) |
---|---|---|
FC0 | 0001 0000 0000 0000 0101 1000 0011 1111 0000 0001 0000 0111 b | 1000 583F 0107 h |
FC1 | 0010 1010 1110 0000 0000 0000 1001 0100 1010 0110 0011 0001 b | 2AE0 0094 A631 h |
FC2 | 0000 1000 0000 0000 0000 0000 0000 1111 0000 0110 0110 0110 b | 0800 000F 0666 h |
FC3 | 0000 0000 0011 1011 0101 0100 1010 1001 1111 1111 0000 0000 b | 003B 54A9 FF00 h |
The controller can configure the FC by the data write command with broadcast mode (see Data Write Command for more detail), the FC0, FC1 registers are updated after the VSYNC command comes, and the other FC registers are updated right away regardless the VSYNC command.