JAJSFA2C September   2014  – April 2018 LP5907-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Output and Input Capacitors
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 LP5907-Q1 Voltage Options
      2. 7.3.2 Enable (EN)
      3. 7.3.3 Low Output Noise
      4. 7.3.4 Output Automatic Discharge
      5. 7.3.5 Remote Output Capacitor Placement
      6. 7.3.6 Thermal Overload Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable (EN)
      2. 7.4.2 Minimum Operating Input Voltage (VIN)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Dissipation and Device Operation
        2. 8.2.2.2 External Capacitors
        3. 8.2.2.3 Input Capacitor
        4. 8.2.2.4 Output Capacitor
        5. 8.2.2.5 Capacitor Characteristics
        6. 8.2.2.6 Remote Capacitor Operation
        7. 8.2.2.7 No-Load Stability
        8. 8.2.2.8 Enable Control
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントの更新通知を受け取る方法
    2. 11.2 コミュニティ・リソース
    3. 11.3 商標
    4. 11.4 静電気放電に関する注意事項
    5. 11.5 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

VIN = VOUT(NOM) + 1 V, VEN = 1.2 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF (unless otherwise noted)(1)(2)(3)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
GENERAL
VIN Input voltage TA = 25°C 2.2 5.5 V
ΔVOUT Output voltage tolerance VIN = (VOUT(NOM) + 1 V) to 5.5 V,
IOUT = 1 mA to 250 mA, VOUT ≥ 1.8 V		 –2 2 %VOUT
VIN = (VOUT(NOM) + 1 V) to 5.5 V,
IOUT = 1 mA to 250 mA, VOUT< 1.8 V		 –3 3
Line regulation VIN = (VOUT(NOM) + 1 V) to 5.5 V,
IOUT = 1 mA		 0.02 %/V
Load regulation IOUT = 1 mA to 250 mA 0.001 %/mA
ILOAD Output load current 0 250 mA
IQ Quiescent current(4) VEN = 1.2 V, IOUT = 0 mA 12 25 µA
VEN = 1.2 V, IOUT = 250 mA 250 425
VEN = 0.3 V (Disabled) 0.2 1
IG Ground current(5) VEN = 1.2 V, IOUT = 0 mA 14 µA
VDO Dropout voltage(6) IOUT = 100 mA 50 mV
IOUT = 250 mA 250
ISC Short-circuit current limit TA = 25°C(7) 250 500 mA
PSRR Power-supply rejection ratio(8) f = 100 Hz, IOUT = 20 mA 90 dB
f = 1 kHz, IOUT = 20 mA 82
f = 10 kHz, IOUT = 20 mA 65
f = 100 kHz, IOUT = 20 mA 60
eN Output noise voltage(8) BW = 10 Hz to 100 kHz IOUT = 1 mA 10 µVRMS
IOUT = 250 mA 6.5
RAD Output automatic discharge pulldown resistance VEN< VIL (output disabled) 230 Ω
TSD Thermal shutdown TJ rising 160 °C
Thermal hysteresis TJ falling from shutdown 15
LOGIC INPUT THRESHOLDS
VIL Low input threshold VIN = 2.2 V to 5.5 V,
VEN falling until the output is disabled		 0.4 V
VIH High input threshold VIN = 2.2 V to 5.5 V,
VEN rising until the output is enabled		 1.2 V
IEN Input current at EN pin(9) VEN = 5.5 V and VIN = 5.5 V 5.5 µA
VEN = 0 V and VIN = 5.5 V 0.001
TRANSIENT CHARACTERISTICS
ΔVOUT Line transient(8) VIN = (VOUT(NOM) + 1 V) to
(VOUT(NOM) + 1.6 V) in 30 µs		 –1 mV
VIN = (VOUT(NOM) + 1.6 V) to
(VOUT(NOM) + 1.6 V) in 30 µs		 1
Load transient(8) IOUT = 1 mA to 250 mA in 10 µs –40
IOUT = 250 mA to 1 mA in 10 µs 40
Overshoot on start-up(8) Stated as a percentage of VOUT(NOM) 5%
Overshoot on start-up with EN(8) Stated as a percentage of VOUT(NOM), VIN = VOUT + 1 V to 5.5 V, 0.7 µF < COUT< 10 µF, 0 mA < IOUT< 250 mA, EN rising until the output is enabled 1%
tON Turnon time From VEN> VIH to VOUT = 95% of VOUT(NOM),
TA = 25°C		 80 150 µs
(1) All voltages are with respect to the device GND terminal, unless otherwise stated.
(2) Minimum and maximum limits are ensured through test, design, or statistical correlation over the junction temperature (TJ) range of –40°C to 125°C, unless otherwise stated. Typical values represent the most likely parametric norm at TA = 25°C, and are provided for reference purposes only.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125°C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application RθJA), as given by the following equation: TA-MAX = TJ-MAX-OP – (RθJA × PD-MAX). See Application and Implementation.
(4) Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.
(5) Ground current is defined here as the total current flowing to ground as a result of all input voltages applied to the device.
(6) Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value.
(7) Short-circuit current (ISC) for the LP5907-Q1 is equivalent to current limit. To minimize thermal effects during testing, ISC is measured with VOUT pulled to 100 mV below its nominal voltage.
(8) This specification is verified by design.
(9) There is a 1-MΩ resistor between EN and ground on the device.