SNVS469F October   2006  – December 2015 LP5952

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Electrical Characteristics: Quiescent Currents
    7. 6.7  Electrical Characteristics: Shutdown Currents
    8. 6.8  Electrical Characteristics: Enable Control
    9. 6.9  Electrical Characteristics: Thermal Protection
    10. 6.10 Electrical Characteristics: Transient Characteristics
    11. 6.11 Input and Output Capacitors (Recommended)
    12. 6.12 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Dual-Rail Supply
      2. 7.3.2 No-Load Stability
      3. 7.3.3 Fast Turnon
      4. 7.3.4 Short-Circuit Protection
      5. 7.3.5 Thermal-Overload Protection
      6. 7.3.6 Reverse Current Path
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Dual-Rail Linear Regulator
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 External Capacitors
          2. 8.2.1.2.2 Input Capacitor
          3. 8.2.1.2.3 Output Capacitor
          4. 8.2.1.2.4 Capacitor Characteristics
          5. 8.2.1.2.5 Power Dissipation and Device Operation
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Additional Application Circuit
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

10 Layout

10.1 Layout Guidelines

For best overall performance, place all circuit components on the same side of the circuit board and as near to the respective LDO pin connections as practical. Place ground return connections as close as possible to the input and output capacitor and to the LDO ground pin, connected by a wide, copper surface. The use of vias and long traces to create LDO circuit connection is strongly discouraged and negatively affect system performance.

10.2 Layout Examples

LP5952 dsbgalayout_snvs469.gif Figure 19. LP5952 DSBGA Layout Example
LP5952 USONlayout_snvs469.gif Figure 20. LP5952 WSON Layout Example