JAJSF48 March 2018 LP87561-Q1 , LP87562-Q1 , LP87563-Q1 , LP87564-Q1 , LP87565-Q1
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
Address: 0x1C
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
Reserved | BUCK1_PG
_INT |
BUCK1_SC
_INT |
BUCK1_ILIM
_INT |
Reserved | BUCK0_PG
_INT |
BUCK0_SC
_INT |
BUCK0_ILIM
_INT |
Bits | Field | Type | Default | Description |
---|---|---|---|---|
7 | Reserved | R/W | 0h | |
6 | BUCK1_PG_INT | R/W1C | 0h | Latched status bit indicating that the BUCK1 output voltage reached the power-good-threshold level.
Write this bit to 1h to clear. |
5 | BUCK1_SC_INT | R/W1C | 0h | Latched status bit indicating that the BUCK1 output voltage has fallen to less than the 0.35-V level during operation or the BUCK1 output did not reach the 0.35-V level in 1 ms from enable.
Write this bit to 1h to clear. |
4 | BUCK1_ILIM_INT | R/W1C | 0h | Latched status bit indicating that output current limit is active.
Write this bit to 1h to clear. |
3 | Reserved | R/W | 0h | |
2 | BUCK0_PG_INT | R/W1C | 0h | Latched status bit indicating that the BUCK0 output voltage reached power-good-threshold level.
Write this bit to 1h to clear. |
1 | BUCK0_SC_INT | R/W1C | 0h | Latched status bit indicating that the BUCK0 output voltage has fallen to less than the 0.35-V level during operation or the BUCK0 output did not reach the 0.35-V level in 1 ms from enable.
Write this bit to 1h to clear. |
0 | BUCK0_ILIM_INT | R/W1C | 0h | Latched status bit indicating that output current limit is active.
Write this bit to 1h to clear. |