JAJSG84B January 2016 – June 2018 LP8758-E0
PRODUCTION DATA.
Address: 0x04
D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
EN_BUCK1 | EN_PIN_
CTRL1 |
EN_PIN_
SELECT1 |
EN_ROOF_
FLOOR1 |
EN_RDIS1 | Reserved | BUCK1_FPWM | Reserved |
Bits | Field | Type | Default | Description |
---|---|---|---|---|
7 | EN_BUCK1 | R/W | 1 * | Enable BUCK1 converter core:
0 - BUCK1 converter core is disabled 1 - BUCK1 converter core is enabled. |
6 | EN_PIN_CTRL1 | R/W | 1 * | Enable EN1/2 pin control for BUCK1:
0 - only EN_BUCK1 bit controls BUCK1 1 - EN_BUCK1 bit AND EN1/2 pin control BUCK1. |
5 | EN_PIN_SELECT1 | R/W | 0 * | Select which ENx pin controls BUCK1 if EN_PIN_CTRL1 = 1:
0 - EN1 pin 1 - EN2 pin. |
4 | EN_ROOF_
FLOOR1 |
R/W | 0 | Enable Roof/Floor control of EN1/2 pin if EN_PIN_CTRL1 = 1:
0 - Enable/Disable (1/0) control 1 - Roof/Floor (1/0) control. |
3 | EN_RDIS1 | R/W | 1 | Enable output discharge resistor when BUCK1 is disabled:
0 - Discharge resistor disabled 1 - Discharge resistor enabled. |
2 | Reserved | R/W | 0 | |
1 | BUCK1_FPWM | R/W | 0 * | Forces the BUCK1 converter core to operate in PWM mode:
0 - Automatic transitions between PFM and PWM modes (AUTO mode). 1 - Forced to PWM operation. |
0 | Reserved | R/W | 0 |