JAJSMP0B October 2021 – June 2024 LP87743-Q1 , LP87744-Q1 , LP87745-Q1
PRODUCTION DATA
PIN | I/O | TYPE | DESCRIPTION | CONNECTION IF NOT USED | |
---|---|---|---|---|---|
NAME | NO. | ||||
SCK_SPI | 1 | I | Digital | Clock signal for SPI interface. | Ground |
SDO_SPI | 2 | O | Digital | Output data signal for SPI interface. | Floating |
FB_B1 | 3 | — | Analog | Output voltage feedback (positive) for BUCK1. | Ground |
CS_SPI/WD_DIS | 4 | I | Digital | Primary function: Chip select signal for SPI interface. | VCCA |
I | Digital | Alternative programmable function: Watchdog Deactivation Input. | Not applicable | ||
AGND | 5 | — | Ground | Ground. | Ground |
NRSTOUT | 6 | O | Digital | Reset output. | Floating |
nINT | 7 | O | Digital | Interrupt output and CAN PHY control or both. | Floating |
SDI_SPI | 8 | I | Digital | Input data signal for SPI interface. | Ground |
VIO_LDO | 9 | — | Analog | IO supply from the internal LDO or from external source. LDO active: regulator filter node. LDO inactive: input for connecting to an external IO supply source, with input filtering capacitor placed. | Not applicable |
VOUT_BST | 10 | — | Analog | BOOST active: BOOST output (internally connected as VIO_LDO input). BOOST inactive and VIO_LDO inactive: short with VIO_LDO. BOOST inactive and VIO_LDO active: input for connecting to an external supply used as VIO_LDO input. | External supply |
SW_BST | 11 | — | Analog | When BOOST active: BOOST input. When BOOST inactive: short with VOUT_BST. | VOUT_BST |
PGND_B3BST | 12 | — | Ground | Power ground for BUCK3 and BOOST. | Ground |
PVIN_B3 | 13 | — | Power | Power input for BUCK3. The separate power pins PVIN_Bxx are not connected together internally – PVIN_Bxx and VCCA pins must be connected together in the application and be locally bypassed. | System supply |
SW_B3 | 14 | — | Analog | BUCK3 switch node. | Floating |
ENABLE | 15 | I | Digital | Programmable ENABLE signal. | Not applicable |
nERR/GPO2 | 16 | I | Digital | Primary function: System MCU Error Monitoring Input. | Ground |
O | Digital | Alternative programmable function: General Purpose Output signal (GPO2). | Floating | ||
O | Digital | Alternative programmable function: Fault Communication Output signal (FAULT2). | Floating | ||
FB_B3 | 17 | — | Analog | Output voltage feedback (positive) for BUCK3. | Ground |
VOUT_VLDO | 18 | — | Power | LDO regulator filter node. LDO is used for internal purposes. No external load allowed. | - |
AGND | 19 | — | Ground | Ground. | Ground |
VCCA | 20 | — | Power | Supply voltage for internal LDO. VCCA and PVIN_Bxx pins must be connected together in the application and be locally bypassed. | System supply |
FB_B2 | 21 | — | Analog | Output voltage feedback (positive) for BUCK2. | Ground |
VMON1/GPO1 | 22 | — | Analog | Voltage monitoring input. | Ground |
O | Digital | Alternative programmable function: General Purpose Output signal (GPO1). | Floating | ||
O | Digital | Alternative programmable function: Fault Communication Output signal (FAULT1). | Floating | ||
O | Digital | Alternative programmable function: CAN PHY control (CAN_DIS). | Floating | ||
SYNCCLKIN | 23 | I | Digital | External clock input. | Ground |
SW_B2 | 24 | — | Analog | BUCK2 switch node. | Floating |
PVIN_B2 | 25 | — | Power | Power input for BUCK2. The separate power pins PVIN_Bxx are not connected together internally – PVIN_Bxx and VCCA pins must be connected together in the application and be locally bypassed. | System supply |
PGND_B12 | 26 | — | Ground | Power ground for BUCK1 and BUCK2. | Ground |
PVIN_B1 | 27 | — | Power | Power input for BUCK1. The separate power pins PVIN_Bxx are not connected together internally – PVIN_Bxx and VCCA pins must be connected together in the application and be locally bypassed. | System supply |
SW_B1 | 28 | — | Analog | BUCK1 switch node. | Floating |