JAJSQQ8A July 2023 – November 2023 LP8868U-Q1 , LP8868V-Q1 , LP8868W-Q1 , LP8868X-Q1 , LP8868Y-Q1 , LP8868Z-Q1
PRODUCTION DATA
The LP8868-Q1 family adopts an adaptive off-time current mode control to support fast transient response over a wide range of operation. The switching frequency is configurable through FSET pin, ranging from 100 kHz to 2.2 MHz.
For average output current regulation, the sensed voltage across the sensing resistor between the CSP and CSN pins is compared with the internal voltage reference, VREF , through the error amplifier. The output of the error amplifier, VCOMP, passes through an external compensation network and is then compared with the peak current feedback at the PWM comparator
During each switching cycle, when the internal N-MOSFET is turned on, the peak currernt is sensed through the internal FET. When the sensed value of peak current reaches VCOMP at the input of PWM comparator, the N-MOSFET is turned off and the adaptive off-time counter starts counting. Once the adaptive off-time counter stops counting, the counter keeps reset until when the N-MOSFET turns off. The counting off time is determined by the external resistor connected to the FSET pin and the input/output feedforward. Thus, the device is able to maintain a nearly constant switching frequnecy at steady state and regulate the output average current at a desired value.