JAJSQQ8A July   2023  – November 2023 LP8868U-Q1 , LP8868V-Q1 , LP8868W-Q1 , LP8868X-Q1 , LP8868Y-Q1 , LP8868Z-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4  Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Adaptive Off-Time Current Mode Control
        1. 7.3.1.1 Switching Frequency Settings
        2. 7.3.1.2 Spread Spectrum
      2. 7.3.2 Setting LED Current
      3. 7.3.3 Internal Soft Start
      4. 7.3.4 Dimming Mode
        1. 7.3.4.1 PWM dimming
        2. 7.3.4.2 Analog dimming
        3. 7.3.4.3 Hybrid Dimming
        4. 7.3.4.4 Flexible Dimming
      5. 7.3.5 Undervoltage Lockout
      6. 7.3.6 Fault Protection
      7. 7.3.7 Thermal Foldback
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 LP8868XQDMTRQ1 12-V Input, 1-A Output, 8-piece LED With Boost Topology
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Inductor Selection
          2. 8.2.1.2.2 Input Capacitor Selection
          3. 8.2.1.2.3 Output Capacitor Selection
          4. 8.2.1.2.4 Sense Resistor Selection
          5. 8.2.1.2.5 Other External Components Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 LP8868YQDMTRQ1 12-V Input, 1-A Output, 5-piece LED With Buck-Boost Topology
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Inductor Selection
          2. 8.2.2.2.2 Input Capacitor Selection
          3. 8.2.2.2.3 Output Capacitor Selection
          4. 8.2.2.2.4 Sense Resistor Selection
          5. 8.2.2.2.5 Other External Components Selection
        3. 8.2.2.3 Application Curves
      3. 8.2.3 LP8868ZQDMTRQ1 12-V Input, 2-A Output, 1-piece LED With Buck Topology
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
          1. 8.2.3.2.1 Inductor Selection
          2. 8.2.3.2.2 Input Capacitor Selection
          3. 8.2.3.2.3 Output Capacitor Selection
          4. 8.2.3.2.4 Sense Resistor Selection
          5. 8.2.3.2.5 Other External Components Selection
        3. 8.2.3.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 商標
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報
8.2.2.2.4 Sense Resistor Selection

The maximum LED current is 1 A at 100% PWM duty and the corresponding VREF is 200 mV. By using Equation 33, the sense resistance is calculated as 200 mΩ. Note that the power consumption of the sense resistor is 200 mW, requiring enough margin of the resistor's power rating in selection.

Equation 22. R S E N S E = V R E F I L E D _ F S

In buck-boost topology, CSENSE is required to achieve the IFD control. Using Equation 23, a 10-µF, 50-V X7R ceramic capacitor is chosen for CSENSE to suppress the ac magnitude of sense feedback less than 200 mV.

Equation 23. C S E N S E =     0.25 × I L ( m a x ) 200 m V × f S W