JAJSFD1B may 2018 – may 2023 LSF0102-Q1
PRODUCTION DATA
For the bidirectional clamping configuration (higher voltage to lower voltage or lower voltage to higher voltage), the EN input must be connected to Vref_B and both pins pulled to HIGH side VCCB through a bias resistor (typically 200 kΩ), as shown in Figure 9-1. This allows Vref_B to regulate the EN input. A filter capacitor on Vref_B is recommended. The controller output driver can be push-pull or open-drain (pull-up resistors may be required) and the peripheral device output can be push-pull or open-drain (pull-up resistors are required to pull the Bn outputs to Vpu).
If either output is push-pull, data must be unidirectional or the outputs must be tri-state and be controlled by some direction-control mechanism to prevent HIGH-to-LOW contention in either direction. If both outputs are open-drain, no direction control is needed.
In Figure 9-1, the reference supply voltage Vref_A is connected to the processor core power supply voltage. Vref_B is connected through a 200 kΩ resistor to a 3.3 V VB_Pullup power supply and Vref_A is set to 1.2 V. The output of A1 has a maximum output voltage equal to Vref_A, and the bidirectional interface on channel 2 has a maximum output voltage equal to VPU1.