JAJSJP4A August 2017 – September 2020 LV14360
PRODUCTION DATA
The following operating description of the LV14360 refers to Section 8.2 and to the waveforms in Figure 8-1. The LV14360 output voltage is regulated by turning on the high-side N-MOSFET with controlled ON time. During high-side switch ON time, the SW pin voltage swings up to approximately VIN, and the inductor current iL increases with linear slope (VIN – VOUT) / L. When the high-side switch is off, inductor current discharges through a freewheel diode with a slope of –VOUT / L. The control parameter of buck converter is defined as Duty Cycle D = tON / TSW, where tON is the high-side switch ON-time and TSW is the switching period. The regulator control loop maintains a constant output voltage by adjusting the duty cycle D. In an ideal Buck converter, where losses are ignored, D is proportional to the output voltage and inversely proportional to the input voltage: D = VOUT / VIN.
The LV14360 employs fixed frequency peak current mode control. A voltage feedback loop is used to get accurate DC voltage regulation by adjusting the peak current command based on voltage offset. The peak inductor current is sensed from the high-side switch and compared to the peak current to control the ON time of the high-side switch. The voltage feedback loop is internally compensated, which allows for fewer external components, makes it easy to design, and provides stable operation with almost any combination of output capacitors. The regulator operates with fixed switching frequency at normal load condition. At very light load, the LV14360 operates in sleep mode to maintain high efficiency and switching frequency will decrease with reduced load current.