JAJST51N February   1989  – February 2024 MAX232

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings #GUID-74EA713C-9196-4407-89E7-009CE1353C64/SLLS8089284
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics, Device
    6. 5.6 Electrical Characteristics, Driver
    7. 5.7 Electrical Characteristics, Receiver
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power
      2. 7.3.2 RS232 Driver
      3. 7.3.3 RS232 Receiver
    4. 7.4 Device Functional Modes
      1. 7.4.1 VCC powered by 5V
      2. 7.4.2 VCC unpowered
      3. 7.4.3 Function Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • NS|16
  • DW|16
  • N|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

5.8 Switching Characteristics

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETERTEST CONDITIONS(1)MINTYP(1)MAXUNIT
SRDriver slew rateRL = 3kΩ to 7kΩ, see Figure 6-230V/μs
SR(t)Driver transition region slew ratesee Figure 6-33V/μs
Data rateOne TOUT switching120kbit/s
tPLH®)Receiver propagation delay time, low- to high-level outputTTL load, see Figure 6-1500ns
tPHL®)Receiver propagation delay time, high- to low-level outputTTL load, see Figure 6-1500ns
(1) Test conditions are C1–C4 = 1μF at VCC = 5V ± 0.5V.