JAJSR16 august 2023 MCF8316C-Q1
PRODUCTION DATA
Table 7-63 lists the memory-mapped registers for the Algorithm_Variables registers. All register offset addresses not listed in Table 7-63 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
190h | ALGORITHM_STATE | Current Algorithm State Register | Go |
196h | FG_SPEED_FDBK | FG Speed Feedback Register | Go |
410h | BUS_CURRENT | Calculated DC Bus Current Register | Go |
440h | PHASE_CURRENT_A | Measured Current on Phase A Register | Go |
442h | PHASE_CURRENT_B | Measured Current on Phase B Register | Go |
444h | PHASE_CURRENT_C | Measured Current on Phase C Register | Go |
468h | CSA_GAIN_FEEDBACK | CSA Gain Register | Go |
472h | VOLTAGE_GAIN_FEEDBACK | Voltage Gain Register | Go |
476h | VM_VOLTAGE | VM Voltage Register | Go |
47Ah | PHASE_VOLTAGE_VA | Phase A Voltage Register | Go |
47Ch | PHASE_VOLTAGE_VB | Phase B Voltage Register | Go |
47Eh | PHASE_VOLTAGE_VC | Phase C Voltage Register | Go |
4B6h | SIN_COMMUTATION_ANGLE | Sine of Commutation Angle | Go |
4B8h | COS_COMMUTATION_ANGLE | Cosine of Commutation Angle | Go |
4D2h | IALPHA | IALPHA Current Register | Go |
4D4h | IBETA | IBETA Current Register | Go |
4D6h | VALPHA | VALPHA Voltage Register | Go |
4D8h | VBETA | VBETA Voltage Register | Go |
4E2h | ID | Measured d-axis Current Register | Go |
4E4h | IQ | Measured q-axis Current Register | Go |
4E6h | VD | VD Voltage Register | Go |
4E8h | VQ | VQ Voltage Register | Go |
524h | IQ_REF_ROTOR_ALIGN | Align Current Reference | Go |
53Ch | SPEED_REF_OPEN_LOOP | Open Loop Speed Register | Go |
54Ch | IQ_REF_OPEN_LOOP | Open Loop Current Reference | Go |
5D4h | SPEED_REF_CLOSED_LOOP | Speed Reference Register | Go |
606h | ID_REF_CLOSED_LOOP | Reference for Current Loop Register | Go |
608h | IQ_REF_CLOSED_LOOP | Reference for Current Loop Register | Go |
682h | ISD_STATE | ISD State Register | Go |
68Ch | ISD_SPEED | ISD Speed Register | Go |
6C0h | IPD_STATE | IPD State Register | Go |
704h | IPD_ANGLE | Calculated IPD Angle Register | Go |
74Ah | ED | Estimated BEMF EQ Register | Go |
74Ch | EQ | Estimated BEMF ED Register | Go |
75Ah | SPEED_FDBK | Speed Feedback Register | Go |
75Eh | THETA_EST | Estimated rotor Position Register | Go |
Complex bit access types are encoded to fit into small table cells. Table 7-64 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Reset or Default Value | ||
-n | Value after reset or the default value |
ALGORITHM_STATE is shown in Figure 7-89 and described in Table 7-65.
Return to the Summary Table.
Current Algorithm State Register
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ALGORITHM_STATE | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ALGORITHM_STATE | |||||||
R-0h | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-0 | ALGORITHM_STATE | R | 0h | 16-bit value indicating current state of device
0h = MOTOR_IDLE 1h = MOTOR_ISD 2h = MOTOR_TRISTATE 3h = MOTOR_BRAKE_ON_START 4h = MOTOR_IPD 5h = MOTOR_SLOW_FIRST_CYCLE 6h = MOTOR_ALIGN 7h = MOTOR_OPEN_LOOP 8h = MOTOR_CLOSED_LOOP_UNALIGNED 9h = MOTOR_CLOSED_LOOP_ALIGNED Ah = MOTOR_CLOSED_LOOP_ACTIVE_BRAKING Bh = MOTOR_SOFT_STOP Ch = MOTOR_RECIRCULATE_STOP Dh = MOTOR_BRAKE_ON_STOP Eh = MOTOR_FAULT Fh = MOTOR_MPET_MOTOR_STOP_CHECK 10h = MOTOR_MPET_MOTOR_STOP_WAIT 11h = MOTOR_MPET_MOTOR_BRAKE 12h = MOTOR_MPET_ALGORITHM_PARAMETERS_INIT 13h = MOTOR_MPET_RL_MEASURE 14h = MOTOR_MPET_KE_MEASURE 15h = MOTOR_MPET_STALL_CURRENT_MEASURE 16h = MOTOR_MPET_TORQUE_MODE 17h = MOTOR_MPET_DONE 18h = MOTOR_MPET_FAULT |
FG_SPEED_FDBK is shown in Figure 7-90 and described in Table 7-66.
Return to the Summary Table.
Speed Feedback from FG
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FG_SPEED_FDBK | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | FG_SPEED_FDBK | R | 0h | 32-bit unsigned value indicating absolute estimated rotor speed estimatedSpeed = (FG_SPEED_FDBK / 227)*MAXIMUM_SPEED_HZ |
BUS_CURRENT is shown in Figure 7-91 and described in Table 7-67.
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Calculated Supply Current Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
BUS_CURRENT | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | BUS_CURRENT | R | 0h | 32-bit signed value indicating bus current. Negative value is represented in two's complement iBus = (BUS_CURRENT / 227) * Base_Current/8 |
PHASE_CURRENT_A is shown in Figure 7-92 and described in Table 7-68.
Return to the Summary Table.
Measured current on Phase A Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PHASE_CURRENT_A | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | PHASE_CURRENT_A | R | 0h | 32-bit signed value indicating measured current on Phase A. Negative value is represented in two's complement iA = (PHASE_CURRENT_A / 227) * Base_Current/8 |
PHASE_CURRENT_B is shown in Figure 7-93 and described in Table 7-69.
Return to the Summary Table.
Measured current on Phase B Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PHASE_CURRENT_B | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | PHASE_CURRENT_B | R | 0h | 32-bit signed value indicating measured current on Phase B. Negative value is represented in two's complement iB = (PHASE_CURRENT_B / 227) * Base_Current/8 |
PHASE_CURRENT_C is shown in Figure 7-94 and described in Table 7-70.
Return to the Summary Table.
Measured current on Phase C Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PHASE_CURRENT_C | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | PHASE_CURRENT_C | R | 0h | 32-bit signed value indicating measured current on Phase C. Negative value is represented in two's complement iC = (PHASE_CURRENT_C / 227) * Base_Current/8 |
CSA_GAIN_FEEDBACK is shown in Figure 7-95 and described in Table 7-71.
Return to the Summary Table.
VM Voltage Register
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
CSA_GAIN_FEEDBACK | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CSA_GAIN_FEEDBACK | |||||||
R-0h | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-0 | CSA_GAIN_FEEDBACK | R | 0h | 16-bit value indicating current sense gain
0h = MAX_CSA_GAIN * 8 1h = MAX_CSA_GAIN * 4 2h = MAX_CSA_GAIN * 2 3h = MAX_CSA_GAIN * 1 |
VOLTAGE_GAIN_FEEDBACK is shown in Figure 7-96 and described in Table 7-72.
Return to the Summary Table.
Voltage Gain Register
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
VOLTAGE_GAIN_FEEDBACK | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VOLTAGE_GAIN_FEEDBACK | |||||||
R-0h | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-0 | VOLTAGE_GAIN_FEEDBACK | R | 0h | 16-bit value indicating voltage gain
0h = 60V 1h = 30V 2h = 15V |
VM_VOLTAGE is shown in Figure 7-97 and described in Table 7-73.
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Supply voltage register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VM_VOLTAGE | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VM_VOLTAGE | R | 0h | 32-bit value indicating dc bus voltage DC Bus Voltage = VM_VOLTAGE * 60 / 227 |
PHASE_VOLTAGE_VA is shown in Figure 7-98 and described in Table 7-74.
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Phase A Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PHASE_VOLTAGE_VA | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | PHASE_VOLTAGE_VA | R | 0h | 32-bit value indicating Phase Voltage Va during ISD Phase A voltage = PHASE_VOLTAGE_VA * 60 / (sqrt(3) * 227) |
PHASE_VOLTAGE_VB is shown in Figure 7-99 and described in Table 7-75.
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Phase B Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PHASE_VOLTAGE_VB | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | PHASE_VOLTAGE_VB | R | 0h | 32-bit value indicating Phase Voltage Vb during ISD Phase B voltage = PHASE_VOLTAGE_VB * 60 / (sqrt(3) * 227) |
PHASE_VOLTAGE_VC is shown in Figure 7-100 and described in Table 7-76.
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Phase C Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PHASE_VOLTAGE_VC | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | PHASE_VOLTAGE_VC | R | 0h | 32-bit value indicating Phase Voltage Vc during ISD Phase C voltage = PHASE_VOLTAGE_VC * 60 / (sqrt(3) * 227) |
SIN_COMMUTATION_ANGLE is shown in Figure 7-101 and described in Table 7-77.
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Sine of Commutation Angle
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SIN_COMMUTATION_ANGLE | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SIN_COMMUTATION_ANGLE | R | 0h | 32-bit signed value indicating sine of commutation Angle. Negative value is represented in two's complement sinCommutationAngle = (SIN_COMMUTATION_ANGLE / 227) |
COS_COMMUTATION_ANGLE is shown in Figure 7-102 and described in Table 7-78.
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Cosine of Commutation Angle
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
COS_COMMUTATION_ANGLE | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | COS_COMMUTATION_ANGLE | R | 0h | 32-bit signed value indicating cosine of commutation Angle. Negative value is represented in two's complement cosCommutationAngle = (COS_COMMUTATION_ANGLE / 227) |
IALPHA is shown in Figure 7-103 and described in Table 7-79.
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IALPHA Current Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IALPHA | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IALPHA | R | 0h | 32-bit signed value indicating calculated IALPHA. Negative value is represented in two's complement iAlpha = (IALPHA / 227) * Base_Current/8 |
IBETA is shown in Figure 7-104 and described in Table 7-80.
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IBETA Current Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IBETA | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IBETA | R | 0h | 32-bit signed value indicating calculated IBETA. Negative value is represented in two's complement iBeta = (IBETA / 227) * Base_Current/8 |
VALPHA is shown in Figure 7-105 and described in Table 7-81.
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VALPHA Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VALPHA | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VALPHA | R | 0h | 32-bit signed value indicating calculated VALPHA. Negative value is represented in two's complement vAlpha = (VALPHA / 227) * 60 / sqrt(3) |
VBETA is shown in Figure 7-106 and described in Table 7-82.
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VBETA Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VBETA | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VBETA | R | 0h | 32-bit signed value indicating calculated VBETA. Negative value is represented in two's complement vBeta = (VBETA / 227) * 60 / sqrt(3) |
ID is shown in Figure 7-107 and described in Table 7-83.
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Measured d-axis Current Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ID | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | ID | R | 0h | 32-bit signed value indicating estimated Id. Negative value is represented in two's complement id = (ID / 227) * Base_Current/8 |
IQ is shown in Figure 7-108 and described in Table 7-84.
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Measured q-axis Current Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IQ | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IQ | R | 0h | 32-bit signed value indicating estimated Iq. Negative value is represented in two's complement iq = (IQ / 227) * Base_Current/8 |
VD is shown in Figure 7-109 and described in Table 7-85.
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VD Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VD | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VD | R | 0h | 32-bit signed value indicating applied Vd. Negative value is represented in two's complement vd = (VD / 227) * 60 / sqrt(3) |
VQ is shown in Figure 7-110 and described in Table 7-86.
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VQ Voltage Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VQ | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VQ | R | 0h | 32-bit signed value indicating applied Vq. Negative value is represented in two's complement vq = (VQ / 227) * 60 / sqrt(3) |
IQ_REF_ROTOR_ALIGN is shown in Figure 7-111 and described in Table 7-87.
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Align Current Reference
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IQ_REF_ROTOR_ALIGN | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IQ_REF_ROTOR_ALIGN | R | 0h | 32-bit signed value indicating Align Current Reference. Negative value is represented in two's complement iqRefRotorAlign = (IQ_REF_ROTOR_ALIGN / 227) * Base_Current/8 |
SPEED_REF_OPEN_LOOP is shown in Figure 7-112 and described in Table 7-88.
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Speed at which motor transitions to close loop
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SPEED_REF_OPEN_LOOP | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SPEED_REF_OPEN_LOOP | R | 0h | 32-bit signed value indicating Open Loop Speed. The value is positive for OUTA-OUTB-OUTC and Negative and represented in two's complement for OUTA-OUTC-OUTB openLoopSpeedRef = (SPEED_REF_OPEN_LOOP / 227) * MAX_SPEED (Hz) |
IQ_REF_OPEN_LOOP is shown in Figure 7-113 and described in Table 7-89.
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Open Loop Current Reference
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IQ_REF_OPEN_LOOP | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IQ_REF_OPEN_LOOP | R | 0h | 32-bit signed value indicating Open Loop Current Reference. Negative value is represented in two's complement iqRefOpenLoop = (IQ_REF_OPEN_LOOP / 227) * Base_Current/8 |
SPEED_REF_CLOSED_LOOP is shown in Figure 7-114 and described in Table 7-90.
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Speed Reference Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SPEED_REF_CLOSED_LOOP | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SPEED_REF_CLOSED_LOOP | R | 0h | 32-bit signed value indicating reference for speed loop. The value is positive for OUTA-OUTB-OUTC and Negative and represented in two's complement for OUTA-OUTC-OUTB Speed Reference in closed loop (Hz) = (SPEED_REF_CLOSED_LOOP/ 227) * MAX_SPEED (Hz) |
ID_REF_CLOSED_LOOP is shown in Figure 7-115 and described in Table 7-91.
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Reference for Current Loop Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ID_REF_CLOSED_LOOP | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | ID_REF_CLOSED_LOOP | R | 0h | 32-bit signed value indicating Id_ref for flux loop. Negative value is represented in two's complement idRefClosedLoop = (ID_REF_CLOSED_LOOP / 227) * Base_Current/8 |
IQ_REF_CLOSED_LOOP is shown in Figure 7-116 and described in Table 7-92.
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Reference for Current Loop Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IQ_REF_CLOSED_LOOP | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IQ_REF_CLOSED_LOOP | R | 0h | 32-bit signed value indicating Iq_ref for torque loop. Negative value is represented in two's complement iqRefClosedLoop = (IQ_REF_CLOSED_LOOP / 227) * Base_Current/8 |
ISD_STATE is shown in Figure 7-117 and described in Table 7-93.
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ISD state Register
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
ISD_STATE | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ISD_STATE | |||||||
R-0h | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-0 | ISD_STATE | R | 0h | 16-bit value indicating current ISD state
0h = ISD_INIT 1h = ISD_MOTOR_STOP_CHECK 2h = ISD_ESTIM_INIT 3h = ISD_RUN_MOTOR_CHECK 4h = ISD_MOTOR_DIRECTION_CHECK 5h = ISD_COMPLETE 6h = ISD_FAULT |
ISD_SPEED is shown in Figure 7-118 and described in Table 7-94.
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ISD Speed Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ISD_SPEED | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | ISD_SPEED | R | 0h | 32-bit value indicating calculated absolute speed during ISD state isdSpeed = (ISD_SPEED / 227) * max_Speed- In Hz |
IPD_STATE is shown in Figure 7-119 and described in Table 7-95.
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IPD state Register
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
IPD_STATE | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IPD_STATE | |||||||
R-0h | |||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
15-0 | IPD_STATE | R | 0h | 16-bit value indicating current IPD state
0h = IPD_INIT 1h = IPD_VECTOR_CONFIG 2h = IPD_RUN 3h = IPD_SLOW_RISE_CLOCK 4h = IPD_SLOW_FALL_CLOCK 5h = IPD_WAIT_CURRENT_DECAY 6h = IPD_GET_TIMES 7h = IPD_SET_NEXT_VECTOR 8h = IPD_CALC_SECTOR_RISE 9h = IPD_CALC_ROTOR_POSITION Ah = IPD_CALC_ANGLE Bh = IPD_COMPLETE Ch = IPD_FAULT |
IPD_ANGLE is shown in Figure 7-120 and described in Table 7-96.
Return to the Summary Table.
Calculated IPD Angle Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IPD_ANGLE | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | IPD_ANGLE | R | 0h | 32-bit signed value indicating measured IPD angle ipdAngle = (IPD_ANGLE / 227) * 360 (Degree) |
ED is shown in Figure 7-121 and described in Table 7-97.
Return to the Summary Table.
Estimated BEMF EQ Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ED | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | ED | R | 0h | 32-bit signed value indicating estimated ED. Negative value is represented in two's complement Ed = (ED / 227) * 60 / sqrt(3) |
EQ is shown in Figure 7-122 and described in Table 7-98.
Return to the Summary Table.
Estimated BEMF ED Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
EQ | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | EQ | R | 0h | 32-bit signed value indicating estimated EQ. Negative value is represented in two's complement Eq = (EQ / 227) * 60 / sqrt(3) |
SPEED_FDBK is shown in Figure 7-123 and described in Table 7-99.
Return to the Summary Table.
Speed Feedback Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SPEED_FDBK | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SPEED_FDBK | R | 0h | 32-bit signed value indicating estimated rotor speed. The value is positive for OUTA-OUTB-OUTC and Negative and represented in two's complement for OUTA-OUTC-OUTB estimatedSpeed = (SPEED_FDBK / 227)*MAXIMUM_SPEED_HZ |
THETA_EST is shown in Figure 7-124 and described in Table 7-100.
Return to the Summary Table.
Estimated rotor Position Register
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
THETA_EST | |||||||||||||||||||||||||||||||
R-0h | |||||||||||||||||||||||||||||||
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | THETA_EST | R | 0h | 32-bit signed value indicating estimated rotor angle. Negative value is represented in two's complement estimatedAngle = (THETA_EST / 227)*360 (Degree) |