JAJSSO4 December 2023 MCT8314Z
ADVANCE INFORMATION
DEVICE | PACKAGES | INTERFACE |
---|---|---|
MCT8314ZS | 24-pin WQFN (3x3 mm) | SPI |
MCT8314ZH | Hardware |
Parameters | MCT8314ZS (SPI variant) | MCT8314ZH (Hardware variant) |
---|---|---|
PWM control mode settings | PWM_MODE bits (4 settings) | MODE pin (7 settings) |
Direction settings | DIR bit (2 settings) | DIR pin (2 settings) |
Current limit threshold | Selectable by resistor to AGND on ILIM pin | |
Current limit configuration | ILIM_RECIR bit (2 settings), PWM_100_DUTY_SEL bit | Recirculation fixed to Brake mode and PWM frequency for 100% duty fixed to 20 kHz |
Lead angle settings | ADVANCE_LVL bits (8 settings) | ADVANCE pin (7 settings) |
FG configuration | FGOUT_SEL bits (4 settings) | 3x or 1x commutation frequency depending FGSEL/LOCK_DET_TIME pin configuration |
Motor lock configuration: mode, detection and retry timing | MTR_LOCK_MODE bits (4 settings), MTR_LOCK_TDET bits (4 settings), MTR_LOCK_RETRY bit (2 settings) | Enabled with 500-ms automatic retry time, FGSEL/LOCK_DET_TIME pin (3 or 4 detection time settings, depending on configuration) |
Automatic synchronous rectification | EN_ASR bit (2 settings) | MODE pin (6 settings) |
OCP configuration | OCP_MODE bits (4 settings), IOCP,min = 3 A, OCP_DEG bits (4 settings), and OCP_RETRY bits (2 settings) | Enabled with latched shutdown mode, IOCP,min = 3 A, 0.6 µs deglitch time |
Overvoltage protection configuration | OVP_EN bit (2 settings), OVP_SEL bit (2 settings) | Enabled and level is fixed to 34 V (typ) |
SDO pin configuration | SDO_MODE bit (2 settings) | NA |
SPI fault configuration | SPI_PARITY bit (2 settings), SPI_SCLK_FLT bit (2 settings), SPI_ADDR_FLT bit (2 settings) | NA |