JAJSG88D May 2013 – October 2020 MSP430F5252 , MSP430F5253 , MSP430F5254 , MSP430F5255 , MSP430F5256 , MSP430F5257 , MSP430F5258 , MSP430F5259
PRODUCTION DATA
TB0 is a 16-bit timer/counter (Timer_B type) with seven capture/compare registers. TB0 supports multiple captures or compares, PWM outputs, and interval timing (see Table 9-15). TB0 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.
INPUT PIN NUMBER | DEVICE INPUT SIGNAL | MODULE INPUT SIGNAL | MODULE BLOCK | MODULE OUTPUT SIGNAL | DEVICE OUTPUT SIGNAL | OUTPUT PIN NUMBER |
---|---|---|---|---|---|---|
RGC, ZXH, ZQE | RGC, ZXH, ZQE | |||||
(1) | TB0CLK | TBCLK | Timer | NA | NA | |
ACLK (internal) | ACLK | |||||
SMCLK (internal) | SMCLK | |||||
(1) | TB0CLK | TBCLK | ||||
(1) | TB0.0 | CCI0A | CCR0 | TB0 | TB0.0 | (1) |
(1) | TB0.0 | CCI0B | ADC10 (internal) ADC10SHSx = {2} |
|||
DVSS | GND | |||||
DVCC | VCC | |||||
(1) | TB0.1 | CCI1A | CCR1 | TB1 | TB0.1 | (1) |
CBOUT (internal) | CCI1B | ADC10 (internal) ADC10SHSx = {3} |
||||
DVSS | GND | |||||
DVCC | VCC | |||||
(1) | TB0.2 | CCI2A | CCR2 | TB2 | TB0.2 | (1) |
(1) | TB0.2 | CCI2B | ||||
DVSS | GND | |||||
DVCC | VCC | |||||
(1) | TB0.3 | CCI3A | CCR3 | TB3 | TB0.3 | (1) |
(1) | TB0.3 | CCI3B | ||||
DVSS | GND | |||||
DVCC | VCC | |||||
(1) | TB0.4 | CCI4A | CCR4 | TB4 | TB0.4 | (1) |
(1) | TB0.4 | CCI4B | ||||
DVSS | GND | |||||
DVCC | VCC | |||||
(1) | TB0.5 | CCI5A | CCR5 | TB5 | TB0.5 | (1) |
(1) | TB0.5 | CCI5B | ||||
DVSS | GND | |||||
DVCC | VCC | |||||
(1) | TB0.6 | CCI6A | CCR6 | TB6 | TB0.6 | (1) |
ACLK (internal) | CCI6B | |||||
DVSS | GND | |||||
DVCC | VCC |