JAJSG45G May 2010 – September 2020 MSP430F5630 , MSP430F5631 , MSP430F5632 , MSP430F5633 , MSP430F5634 , MSP430F5635 , MSP430F5636 , MSP430F5637 , MSP430F5638
PRODUCTION DATA
The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430 development tools and device programmers. Table 9-7 lists the JTAG pin requirements. For further details on interfacing to development tools and device programmers, see the MSP430 Hardware Tools User's Guide. For a complete description of the features of the JTAG interface and its implementation, see MSP430 Programming With the JTAG Interface.
DEVICE SIGNAL | DIRECTION | FUNCTION |
---|---|---|
PJ.3/TCK | IN | JTAG clock input |
PJ.2/TMS | IN | JTAG state control |
PJ.1/TDI/TCLK | IN | JTAG data input, TCLK input |
PJ.0/TDO | OUT | JTAG data output |
TEST/SBWTCK | IN | Enable JTAG pins |
RST/NMI/SBWTDIO | IN | External reset |
VCC | Power supply | |
VSS | Ground supply |