JAJSG44G June   2010  – September 2020 MSP430F6630 , MSP430F6631 , MSP430F6632 , MSP430F6633 , MSP430F6634 , MSP430F6635 , MSP430F6636 , MSP430F6637 , MSP430F6638

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 機能ブロック図
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagrams
    2. 7.2 Signal Descriptions
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Active Mode Supply Current Into VCC Excluding External Current
    5. 8.5  Low-Power Mode Supply Currents (Into VCC) Excluding External Current
    6. 8.6  Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current
    7. 8.7  Thermal Resistance Characteristics
    8. 8.8  Schmitt-Trigger Inputs – General-Purpose I/O
    9. 8.9  Inputs – Ports P1, P2, P3, and P4
    10. 8.10 Leakage Current – General-Purpose I/O
    11. 8.11 Outputs – General-Purpose I/O (Full Drive Strength)
    12. 8.12 Outputs – General-Purpose I/O (Reduced Drive Strength)
    13. 8.13 Output Frequency – Ports P1, P2, and P3
    14. 8.14 Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)
    15. 8.15 Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)
    16. 8.16 Crystal Oscillator, XT1, Low-Frequency Mode
    17. 8.17 Crystal Oscillator, XT2
    18. 8.18 Internal Very-Low-Power Low-Frequency Oscillator (VLO)
    19. 8.19 Internal Reference, Low-Frequency Oscillator (REFO)
    20. 8.20 DCO Frequency
    21. 8.21 PMM, Brownout Reset (BOR)
    22. 8.22 PMM, Core Voltage
    23. 8.23 PMM, SVS High Side
    24. 8.24 PMM, SVM High Side
    25. 8.25 PMM, SVS Low Side
    26. 8.26 PMM, SVM Low Side
    27. 8.27 Wake-up Times From Low-Power Modes and Reset
    28. 8.28 Timer_A, Timers TA0, TA1, and TA2
    29. 8.29 Timer_B, Timer TB0
    30. 8.30 Battery Backup
    31. 8.31 USCI (UART Mode)
    32. 8.32 USCI (SPI Master Mode)
    33. 8.33 USCI (SPI Slave Mode)
    34. 8.34 USCI (I2C Mode)
    35. 8.35 LCD_B, Recommended Operating Conditions
    36. 8.36 LCD_B, Electrical Characteristics
    37. 8.37 12-Bit ADC, Power Supply and Input Range Conditions
    38. 8.38 12-Bit ADC, Timing Parameters
    39. 8.39 12-Bit ADC, Linearity Parameters Using an External Reference Voltage
    40. 8.40 12-Bit ADC, Linearity Parameters Using AVCC as Reference Voltage
    41. 8.41 12-Bit ADC, Linearity Parameters Using the Internal Reference Voltage
    42. 8.42 12-Bit ADC, Temperature Sensor and Built-In VMID
    43. 8.43 REF, External Reference
    44. 8.44 REF, Built-In Reference
    45. 8.45 12-Bit DAC, Supply Specifications
    46. 8.46 12-Bit DAC, Linearity Specifications
    47. 8.47 12-Bit DAC, Output Specifications
    48. 8.48 12-Bit DAC, Reference Input Specifications
    49. 8.49 12-Bit DAC, Dynamic Specifications
    50. 8.50 12-Bit DAC, Dynamic Specifications (Continued)
    51. 8.51 Comparator_B
    52. 8.52 Ports PU.0 and PU.1
    53. 8.53 USB Output Ports DP and DM
    54. 8.54 USB Input Ports DP and DM
    55. 8.55 USB-PWR (USB Power System)
    56. 8.56 USB-PLL (USB Phase-Locked Loop)
    57. 8.57 Flash Memory
    58. 8.58 JTAG and Spy-Bi-Wire Interface
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  CPU
    3. 9.3  Instruction Set
    4. 9.4  Operating Modes
    5. 9.5  Interrupt Vector Addresses
    6. 9.6  Memory
    7. 9.7  Bootloader (BSL)
      1. 9.7.1 USB BSL
      2. 9.7.2 UART BSL
    8. 9.8  JTAG Operation
      1. 9.8.1 JTAG Standard Interface
      2. 9.8.2 Spy-Bi-Wire Interface
    9. 9.9  Flash Memory
    10. 9.10 RAM
    11. 9.11 Backup RAM
    12. 9.12 Peripherals
      1. 9.12.1  Digital I/O
      2. 9.12.2  Port Mapping Controller
      3. 9.12.3  Oscillator and System Clock
      4. 9.12.4  Power-Management Module (PMM)
      5. 9.12.5  Hardware Multiplier (MPY) (Link to User's Guide)
      6. 9.12.6  Real-Time Clock (RTC_B)
      7. 9.12.7  Watchdog Timer (WDT_A)
      8. 9.12.8  System Module (SYS)
      9. 9.12.9  DMA Controller
      10. 9.12.10 Universal Serial Communication Interface (USCI)
      11. 9.12.11 Timer TA0
      12. 9.12.12 Timer TA1
      13. 9.12.13 Timer TA2
      14. 9.12.14 Timer TB0
      15. 9.12.15 Comparator_B
      16. 9.12.16 ADC12_A
      17. 9.12.17 DAC12_A
      18. 9.12.18 CRC16
      19. 9.12.19 Voltage Reference (REF) Module
      20. 9.12.20 LCD_B
      21. 9.12.21 USB Universal Serial Bus
      22. 9.12.22 Embedded Emulation Module (EEM)
      23. 9.12.23 Peripheral File Map
    13. 9.13 Input/Output Diagrams
      1. 9.13.1  Port P1 (P1.0 to P1.7) Input/Output With Schmitt Trigger
      2. 9.13.2  Port P2 (P2.0 to P2.7) Input/Output With Schmitt Trigger
      3. 9.13.3  Port P3 (P3.0 to P3.7) Input/Output With Schmitt Trigger
      4. 9.13.4  Port P4 (P4.0 to P4.7) Input/Output With Schmitt Trigger
      5. 9.13.5  Port P5 (P5.0 and P5.1) Input/Output With Schmitt Trigger
      6. 9.13.6  Port P5 (P5.2 to P5.7) Input/Output With Schmitt Trigger
      7. 9.13.7  Port P6 (P6.0 to P6.7) Input/Output With Schmitt Trigger
      8. 9.13.8  Port P7 (P7.2) Input/Output With Schmitt Trigger
      9. 9.13.9  Port P7 (P7.3) Input/Output With Schmitt Trigger
      10. 9.13.10 Port P7 (P7.4 to P7.7) Input/Output With Schmitt Trigger
      11. 9.13.11 Port P8 (P8.0 to P8.7) Input/Output With Schmitt Trigger
      12. 9.13.12 Port P9 (P9.0 to P9.7) Input/Output With Schmitt Trigger
      13. 9.13.13 Port PU (PU.0/DP, PU.1/DM, PUR) USB Ports
      14. 9.13.14 Port PJ (PJ.0) JTAG Pin TDO, Input/Output With Schmitt Trigger or Output
      15. 9.13.15 Port PJ (PJ.1 to PJ.3) JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output
    14. 9.14 Device Descriptors
  10. 10Device and Documentation Support
    1. 10.1  Getting Started and Next Steps
    2. 10.2  Device Nomenclature
    3. 10.3  Tools and Software
    4. 10.4  Documentation Support
    5. 10.5  Related Links
    6. 10.6  サポート・リソース
    7. 10.7  Trademarks
    8. 10.8  静電気放電に関する注意事項
    9. 10.9  Export Control Notice
    10. 10.10 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.44 REF, Built-In Reference

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1)
PARAMETERTEST CONDITIONSVCCMINTYPMAXUNIT
VREF+Positive built-in reference voltage outputREFVSEL = {2} for 2.5 V,
REFON = REFOUT = 1 , IVREF+ = 0 A		3 V2.5±1%V
REFVSEL = {1} for 2 V,
REFON = REFOUT = 1, IVREF+ = 0 A		3 V2.0±1%
REFVSEL = {0} for 1.5 V,
REFON = REFOUT = 1, IVREF+ = 0 A		2.2 V, 3 V1.5±1%
AVCC(min)AVCC minimum voltage, Positive built-in reference activeREFVSEL = {0} for 1.5 V2.2V
REFVSEL = {1} for 2 V2.3
REFVSEL = {2} for 2.5 V2.8
IREF+Operating supply current into AVCC terminal (2) (7)ADC12SR = 1(8), REFON = 1, REFOUT = 0, REFBURST = 03 V70100µA
ADC12SR = 1(8), REFON = 1, REFOUT = 1, REFBURST = 00.450.75mA
ADC12SR = 0(8), REFON = 1, REFOUT = 0, REFBURST = 0210310µA
ADC12SR = 0(8), REFON = 1, REFOUT = 1, REFBURST = 00.951.7mA
IL(VREF+)Load-current regulation, VREF+ terminal(3)REFVSEL = {0, 1, 2},
IVREF+ = +10 µA , –1000 µA,
AVCC = AVCC(min) for each reference level,
REFVSEL = {0, 1, 2}, REFON = REFOUT = 1		15002500µV/mA
CVREF+Capacitance at VREF+ terminalREFON = REFOUT = 1(6),
0 mA ≤ IVREF+ ≤ IVREF+(max)		2.2 V, 3 V20100pF
TCREF+Temperature coefficient of built-in reference(4)IVREF+ is a constant in the range of 0 mA ≤ IVREF+ ≤ –1 mAREFOUT = 02.2 V, 3 V20ppm/ °C
TCREF+Temperature coefficient of built-in reference(4)IVREF+ is a constant in the range of 0 mA ≤ IVREF+ ≤ –1 mAREFOUT = 12.2 V, 3 V2050ppm/ °C
PSRR_DCPower supply rejection ratio (DC)AVCC = AVCC(min) to AVCC(max),
TA = 25°C, REFVSEL = {0, 1, 2}, REFON = 1,
REFOUT = 0 or 1		120300µV/V
PSRR_ACPower supply rejection ratio (AC)AVCC = AVCC(min) to AVCC(max),
TA = 25°C, REFVSEL = {0, 1, 2}, REFON = 1,
REFOUT = 0 or 1		1mV/V
tSETTLESettling time of reference voltage(5)AVCC = AVCC(min) to AVCC(max),
REFVSEL = {0, 1, 2}, REFOUT = 0,
REFON = 0 → 1		75µs
AVCC = AVCC(min) to AVCC(max),
CVREF = CVREF(max), REFVSEL = {0, 1, 2},
REFOUT = 1, REFON = 0 → 1		75
(1) The reference is supplied to the ADC by the REF module and is buffered locally inside the ADC. The ADC uses two internal buffers, one smaller and one larger for driving the VREF+ terminal. When REFOUT = 1, the reference is available at the VREF+ terminal, as well as, used as the reference for the conversion and uses the larger buffer. When REFOUT = 0, the reference is only used as the reference for the conversion and uses the smaller buffer.
(2) The internal reference current is supplied by the AVCC terminal. Consumption is independent of the ADC12ON control bit, unless a conversion is active. REFOUT = 0 represents the current contribution of the smaller buffer. REFOUT = 1 represents the current contribution of the larger buffer without external load.
(3) Contribution only due to the reference and buffer including package. This does not include resistance due to PCB traces or other external factors.
(4) Calculated using the box method: (MAX(–40°C to +85°C) – MIN(–40°C to +85°C)) / MIN(–40°C to +85°C)/(85°C – (–40°C)).
(5) The condition is that the error in a conversion started after tREFON is less than ±0.5 LSB. The settling time depends on the external capacitive load when REFOUT = 1.
(6) Connect two decoupling capacitors, 10 µF and 100 nF, to VREF to decouple the dynamic current required for an external reference source if it is used for the ADC12_A. Also see the MSP430F5xx and MSP430F6xx Family User's Guide.
(7) The temperature sensor is provided by the REF module. Its current is supplied by terminal AVCC and is equivalent to IREF+ with REFON = 1 and REFOUT = 0.
(8) For devices without the ADC12, the parametric with ADC12SR = 0 are applicable.