JAJSG92D December 2011 – September 2018 MSP430F6720 , MSP430F6721 , MSP430F6723 , MSP430F6724 , MSP430F6725 , MSP430F6726 , MSP430F6730 , MSP430F6731 , MSP430F6733 , MSP430F6734 , MSP430F6735 , MSP430F6736
PRODUCTION DATA.
TA2 is a 16-bit timer/counter (Timer_A type) with two capture/compare registers. TA2 can support multiple capture/compares, PWM outputs, and interval timing (see Table 6-15). TA2 also has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each of the capture/compare registers.
DEVICE INPUT SIGNAL | MODULE INPUT NAME | MODULE BLOCK | MODULE OUTPUT SIGNAL | DEVICE OUTPUT SIGNAL |
---|---|---|---|---|
PM_TACLK | TACLK | Timer | NA | NA |
ACLK (internal) | ACLK | |||
SMCLK (internal) | SMCLK | |||
PM_TACLK | INCLK | |||
PM_TA2.0 | CCI0A | CCR0 | TA0 | PM_TA2.0 |
DVSS | CCI0B | |||
DVSS | GND | |||
DVCC | VCC | |||
PM_TA2.1 | CCI1A | CCR1 | TA1 | PM_TA2.1 |
ACLK (internal) | CCI1B | SD24_B (internal)
SD24SCSx = {2} |
||
DVSS | GND | |||
DVCC | VCC |