JAJSG94 データシート

JAJSG94D November 2012 – September 2018 MSP430F67451 , MSP430F67461 , MSP430F67471 , MSP430F67481 , MSP430F67491 , MSP430F67651 , MSP430F67661 , MSP430F67671 , MSP430F67681 , MSP430F67691 , MSP430F67751 , MSP430F67761 , MSP430F67771 , MSP430F67781 , MSP430F67791

PRODUCTION DATA.

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

PZ|100
- MTQF013A

サーマルパッド・メカニカル・データ

PZ|100
- QFND428

発注情報

5.63 JTAG and Spy-Bi-Wire Interface

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		V_CC	MIN	TYP	MAX	UNIT
f_SBW	Spy-Bi-Wire input frequency	2.2 V, 3 V	0		20	MHz
t_SBW,Low	Spy-Bi-Wire low clock pulse duration	2.2 V, 3 V	0.025		15	µs
t_{SBW, En}	Spy-Bi-Wire enable time (TEST high to acceptance of first clock edge)⁽¹⁾	2.2 V, 3 V			1	µs
t_SBW,Rst	Spy-Bi-Wire return to normal operation time		15		100	µs
f_TCK	TCK input frequency for 4-wire JTAG⁽²⁾	2.2 V	0		5	MHz
f_TCK	TCK input frequency for 4-wire JTAG⁽²⁾	3 V	0		10	MHz
R_internal	Internal pulldown resistance on TEST	2.2 V, 3 V	45	60	80	kΩ

(1) Tools that access the Spy-Bi-Wire interface must wait for the minimum t_SBW,En time after pulling the TEST/SBWTCK pin high before applying the first SBWTCK clock edge.

(2) f_TCK may be restricted to meet the timing requirements of the module selected.