2 改訂履歴
Changes from May 29, 2014 to September 28, 2018
- Section 1.1「特長」を更新 Go
- Section 1.3「概要」を更新 Go
- Added Section 3.1, Related ProductsGo
- Corrected the port number (P4.2) on pin 61 in Figure 4-2, 100-Pin PZ Package (Top View)Go
- Added note to P1.3/ADC10CLK/A3 (pin 8) in Table 4-3, Terminal Functions – PEU PackageGo
- Added typical conditions statements at the beginning of Section 5, SpecificationsGo
- Added SD24_B input pins and AUXVCCx pins to exception list on "Voltage applied to pins" parameter, and added SD24_B input pin limits in "Diode current at pins" parameter in Section 5.1, Absolute Maximum RatingsGo
- Added Section 5.2, ESD RatingsGo
- Added Section 5.7, Thermal Resistance CharacteristicsGo
- Updated notes (1) and (2) and added note (3) in Table 5-1, Wake-up Times From Low-Power Modes and ResetGo
- Changed the TYP value of the CL,eff parameter with Test Conditions of "XTS = 0, XCAPx = 0" from 2 pF to 1 pF in Table 5-2, Crystal Oscillator, XT1, Low-Frequency ModeGo
- Corrected bit name in Test Conditions of RCHARGE parameter (changed CHCx to AUXCHCx) in Table 5-25, Auxiliary Supplies, Charge Limiting ResistorGo
- Replaced fFrame parameter with fLCD, fFRAME,4mux, and fFRAME,8mux parameters in Table 5-37, LCD_C, Operating ConditionsGo
- On the VID,FS parameter in Table 5-39, SD24_B Power Supply and Recommended Operating Conditions: Changed the MIN value from "VREF/GAIN" to "–VREF/GAIN"; Removed "Unipolar mode" test condition (mode is not supported)Go
- Removed ADC10DIV from the formula for the TYP value in the second row of the tCONVERT parameter in Table 5-48, 10-Bit ADC, Switching Characteristics, because ADC10CLK is after divisionGo
- Changed Test Conditions for all parameters in Table 5-49, 10-Bit ADC Linearity Parameters: Removed "VREF–"; Changed from "(VeREF+ – VeREF–)min ≤ (VeREF+ – VeREF–)" to "1.4 V ≤ (VeREF+ – VeREF–)"; Changed from "CVREF+ = 20 pF" to "CVeREF+ = 20 pF"; Added "CVeREF+ = 20 pF" to EI; Added "ADC10SREFx = 11b" to ET and EGGo
- Changed from "VREF–/VeREF–" to "VeREF–" in Test Conditions for VeREF+, VeREF–, and (VeREF+ – VeREF–) parameters in Table 5-50, 10-Bit ADC, External ReferenceGo
- Changed the MIN value of AVCC(min) with Test Conditions of "REFVSEL = {0} for 1.5 V" from 2.2 V to 1.8 V in Table 5-51, REF Built-In ReferenceGo
- Changed the MAX value of the tEN_CMP parameter with Test Conditions of "CBPWRMD = 10" from 50 µs to 100 µs in Table 5-52, Comparator_BGo
- Corrected the name of the RTC module (changed from RTC_CE to RTC_C) in Figure 6-1, Functional Block Diagram – PEU PackageGo
- Corrected the name of the RTC module (changed from RTC_CE to RTC_C) in Figure 6-2, Functional Block Diagram – PZ PackageGo
- Throughout document, changed all instances of "bootstrap loader" to "bootloader"Go
- Corrected spelling of NMIIFG in Table 6-13, System Module Interrupt Vector RegistersGo
- Deleted mention of counter mode in Section 6.11.21, Real-Time Clock (RTC_C) (feature is not supported in this device)Go
- 従来の「開発ツールのサポート」セクションをSection 8.3「ツールとソフトウェア」に置き換えGo
- フォーマットを変更し、Section 8.4「ドキュメントのサポート」に内容を追加Go