JAJSG80 データシート

JAJSG80B May 2015 – September 2020 MSP430FG6425 , MSP430FG6426 , MSP430FG6625 , MSP430FG6626

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

PZ|100
- MTQF013A

サーマルパッド・メカニカル・データ

PZ|100
- QFND428

発注情報

8.8.12.1 REF and REFBG, Built-In Reference

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_REFBG	Operating supply current into AVCC terminal⁽¹⁾	V_CC = 3.0 V, REFON = 1 and REFOUT = 1		110	130	µA
V_REFBG	Bandgap output voltage calibrated	V_CC = 3.0 V, VeREF+ ≤ 1.5 V if used	1.146	1.16	1.174	V
I_REF	Operating supply current into AVCC terminal⁽¹⁾	V_CC = 3.0 V, REFON = 1		15	20	µA
V_REF	Positive built-in reference voltage output	REFVSEL = {2} for 2.5 V, REFON = 1		2.5	±1%	V
		REFVSEL = {1} for 2.0 V, REFON = 1		2.0	±1%
		REFVSEL = {0} for 1.5 V, REFON = 1		1.5	±1%
AV_CC(min)	AVCC minimum voltage, Positive built-in reference active	DAC12SREFx = 0, REFVSEL = {0} for 1.5 V	2.2			V
		DAC12SREFx = 0, REFVSEL = {1} for 2 V	2.3
		DAC12SREFx = 0, REFVSEL = {2} for 2.5 V	2.8
PSRR_DC	Power supply rejection ratio (DC)	V_CC = 2.2 V to 3.6 V, T_A = 25°C		50		µV/V
PSRR_AC	Power supply rejection ratio (AC)	V_CC = 2.2 V to 3.6 V, T_A = 25°C, f = 1 kHz, ΔVpp = 100 mV		1.5		mV/V
TC_REF+	Bandgap reference temperature coefficient⁽²⁾	I_VREF+ = 0 A		15	50	ppm/°C
t_SETTLE	Settling time of V_REFBG reference voltage⁽³⁾	AV_CC = AV_CC_(min) through AV_CC(max), REFON = 0 → 1			120	µs
C_VREFBG	Capacitance at VREFBG terminal	See ⁽⁴⁾			1	nF
I_LOAD	VREFBG maximum load current	REFOUT = REFON = 1			1	mA
I_L(VREFBG)	Load-current regulation, VREFBG terminal⁽⁵⁾	I_(VREF+) = +1 mA or –1 mA, AV_CC = AV_CC_(min), REFON = REFOUT = 1			3.5	mV/mA

(1) The internal reference current is supplied from terminal AVCC. Consumption is independent of the CTSD16ON control bit, unless a conversion is active. The REFON bit enables to settle the built-in reference before starting an A/D conversion.

(2) Calculated using the box method: (MAX(–40°C to 85°C) – MIN(–40°C to 85°C)) / MIN(–40°C to 85°C)/(85°C – (–40°C)).

(3) The condition is that the error in a conversion started after t_REFON is less than ±0.5 LSB.

(4) There is no capacitance required on VREFBG if the reference voltage is not used externally. However, TI recommends a capacitance close to the maximum value to reduce any reference voltage noise.

(5) Contribution only due to the reference and buffer including package. This does not include resistance due to PCB traces or other external factors.