JAJSG17D June 2014 – August 2018 MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR59891 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
PRODUCTION DATA.
PARAMETER | TEST CONDITIONS | MIN | MAX | UNIT | |
---|---|---|---|---|---|
feUSCI | eUSCI input clock frequency | Internal: SMCLK or ACLK,
External: UCLK, Duty cycle = 50% ±10% |
16 | MHz | |
fBITCLK | BITCLK clock frequency
(equals baud rate in MBaud) |
4 | MHz |
Table 5-17 lists the characteristics of the eUSCI in UART mode.