JAJSG26C March 2016 – August 2018 MSP430FR5962 , MSP430FR5964 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941
PRODUCTION DATA.
Figure 6-14 shows the port diagram. Table 6-31 summarizes the selection of the pin functions.
NOTE:
Functional representation only.PIN NAME (P5.x) | x | FUNCTION | CONTROL BITS AND SIGNALS(1) | ||
---|---|---|---|---|---|
P5DIR.x | P5SEL1.x | P5SEL0.x | |||
P5.0/UCB1SIMO/UCB1SDA | 0 | P5.0 (I/O) | I: 0; O: 1 | 0 | 0 |
UCB1SIMO/UCB1SDA | X(1) | 0 | 1 | ||
N/A | 0 | 1 | X | ||
Internally tied to DVSS | 1 | ||||
P5.1/UCB1SOMI/UCB1SCL | 1 | P5.1 (I/O) | I: 0; O: 1 | 0 | 0 |
UCB1SOMI/UCB1SCL | X(1) | 0 | 1 | ||
N/A | 0 | 1 | X | ||
Internally tied to DVSS | 1 | ||||
P5.2/UCB1CLK/TA4CLK | 2 | P5.2 (I/O) | I: 0; O: 1 | 0 | 0 |
UCB1CLK | X(1) | 0 | 1 | ||
TA4CLK | 0 | 1 | 0 | ||
Internally tied to DVSS | 1 | ||||
N/A | 0 | 1 | 1 | ||
Internally tied to DVSS | 1 | ||||
P5.3/UCB1STE | 3 | P5.3 (I/O) | I: 0; O: 1 | 0 | 0 |
UCB1STE | X(1) | 0 | 1 | ||
N/A | 0 | 1 | 1 | ||
Internally tied to DVSS | 1 | ||||
P5.4/UCA2TXD/UCA2SIMO/TB0OUTH | 4 | P5.4 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA2TXD/UCA2SIMO | X(2) | 0 | 1 | ||
N/A | 0 | 1 | 0 | ||
Internally tied to DVSS | 1 | ||||
TB0OUTH | 0 | 1 | 1 | ||
Internally tied to DVSS | 1 | ||||
P5.5/UCA2RXD/UCA2SOMI/ACLK | 5 | P5.5 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA2RXD/UCA2SOMI | X(2) | 0 | 1 | ||
N/A | 0 | 0 | 1 | ||
Internally tied to DVSS | 1 | ||||
N/A | 0 | 1 | 1 | ||
ACLK | 1 | ||||
P5.6/UCA2CLK/TA4.0/SMCLK | 6 | P5.6 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA2CLK | X(2) | 0 | 1 | ||
TA4.CCI0A | 0 | 1 | 0 | ||
TA4.0 | 1 | ||||
N/A | 0 | 1 | 1 | ||
SMCLK | 1 | ||||
P5.7/UCA2STE/TA4.1/MCLK | 7 | P5.7 (I/O) | I: 0; O: 1 | 0 | 0 |
UCA2STE | X(2) | 0 | 1 | ||
TA4.CCI1A | 0 | 1 | 0 | ||
TA4.1 | 1 | ||||
NA | 0 | 1 | 1 | ||
MCLK | 1 |