JAJSGU5 データシート

JAJSGU5B January 2019 – December 2021 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431

PRODUCTION DATA

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）

PN|80
- MTQF010B

サーマルパッド・メカニカル・データ

発注情報

8.13.12.1 Comparator_E

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

PARAMETER		TEST CONDITIONS	V_CC	MIN	TYP	MAX	UNIT
I_{AVCC_COMP}	Comparator operating supply current into AVCC, excludes reference resistor ladder	CEPWRMD = 00, CEON = 1, CERSx = 00 (fast)	2.2 V, 3.0 V		12	16	µA
		CEPWRMD = 01, CEON = 1, CERSx = 00 (medium)			10	14
		CEPWRMD = 10, CEON = 1, CERSx = 00 (slow), T_A = 30°C			0.1	0.3
		CEPWRMD = 10, CEON = 1, CERSx = 00 (slow), T_A = 85°C			0.3	1.3
I_{AVCC_COMP_REF}	Quiescent current of resistor ladder into AVCC, including REF module current	CEREFLx = 01, CERSx = 10, REFON = 0, CEON = 1, CEREFACC = 0	2.2 V, 3.0 V		31	38	µA
I_{AVCC_COMP_REF}		CEREFLx = 01, CERSx = 10, REFON = 0, CEON = 1, CEREFACC = 1	2.2 V, 3.0 V		16	19	µA
V_REF	Reference voltage level	CERSx = 11, CEREFLx = 01, CEREFACC = 0	1.8 V	1.152	1.2	1.248	V
		CERSx = 11, CEREFLx = 10, CEREFACC = 0	2.2 V	1.92	2.0	2.08
		CERSx = 11, CEREFLx = 11, CEREFACC = 0	2.7 V	2.40	2.5	2.60
		CERSx = 11, CEREFLx = 01, CEREFACC = 1	1.8 V	1.10	1.2	1.245
		CERSx = 11, CEREFLx = 10, CEREFACC = 1	2.2 V	1.90	2.0	2.08
		CERSx = 11, CEREFLx = 11, CEREFACC = 1	2.7 V	2.35	2.5	2.60
V_IC	Common-mode input range			0		V_CC – 1	V
V_OFFSET	Input offset voltage	CEPWRMD = 00		–16		16	mV
		CEPWRMD = 01		–12		12
		CEPWRMD = 10		–37		37
C_IN	Input capacitance	CEPWRMD = 00 or CEPWRMD = 01			10		pF
C_IN	Input capacitance	CEPWRMD = 10			10		pF
R_SIN	Series input resistance	ON (switch closed)			1	3	kΩ
R_SIN	Series input resistance	OFF (switch open)		50			MΩ
t_PD	Propagation delay, response time	CEPWRMD = 00, CEF = 0, Overdrive ≥ 20 mV			193	330	ns
		CEPWRMD = 01, CEF = 0, Overdrive ≥ 20 mV			230	400	ns
		CEPWRMD = 10, CEF = 0, Overdrive ≥ 20 mV			5	15	µs
t_PD,filter	Propagation delay with filter active	CEPWRMD = 00 or 01, CEF = 1, Overdrive ≥ 20 mV, CEFDLY = 00			700	1000	ns
		CEPWRMD = 00 or 01, CEF = 1, Overdrive ≥ 20 mV, CEFDLY = 01			1.0	1.9	µs
		CEPWRMD = 00 or 01, CEF = 1, Overdrive ≥ 20 mV, CEFDLY = 10			2.0	3.7
		CEPWRMD = 00 or 01, CEF = 1, Overdrive ≥ 20 mV, CEFDLY = 11			4.0	7.7
t_{EN_CMP}	Comparator enable time	CEON = 0 → 1, VIN+, VIN- from pins, Overdrive ≥ 20 mV, CEPWRMD = 00			0.9	1.5	µs
		CEON = 0 → 1, VIN+, VIN- from pins, Overdrive ≥ 20 mV, CEPWRMD = 01			0.9	1.5
		CEON = 0 → 1, VIN+, VIN- from pins, Overdrive ≥ 20 mV, CEPWRMD = 10			15	65
t_{EN_CMP_VREF}	Comparator and reference ladder and reference voltage enable time	CEON = 0 → 1, CEREFLX = 10, CERSx = 10 or 11, CEREF0 = CEREF1 = 0x0F, REFON = 0			120	220	µs
t_{EN_CMP_RL}	Comparator and reference ladder enable time	CEON = 0 → 1, CEREFLX = 10, CERSx = 10, REFON = 1, CEREF0 = CEREF1 = 0x0F			10	30	µs
V_{CE_REF}	Reference voltage for a given tap	VIN = reference into resistor ladder, n = 0 to 31		VIN × (n + 0.5) / 32	VIN × (n + 1) / 32	VIN × (n + 1.5) / 32	V