JAJSG18C August 2014 – August 2018 MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791
PRODUCTION DATA.
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
VCC,LCD_C,CP en,3.6 | Supply voltage range, charge pump enabled, VLCD ≤ 3.6 V | LCDCPEN = 1, 0000b < VLCDx ≤ 1111b (charge pump enabled, VLCD ≤ 3.6 V) | 2.2 | 3.6 | V | |
VCC,LCD_C,CP en,3.3 | Supply voltage range, charge pump enabled, VLCD ≤ 3.3 V | LCDCPEN = 1, 0000b < VLCDx ≤ 1100b (charge pump enabled, VLCD ≤ 3.3 V) | 2.0 | 3.6 | V | |
VCC,LCD_C,int. bias | Supply voltage range, internal biasing, charge pump disabled | LCDCPEN = 0, VLCDEXT = 0 | 2.4 | 3.6 | V | |
VCC,LCD_C,ext. bias | Supply voltage range, external biasing, charge pump disabled | LCDCPEN = 0, VLCDEXT = 0 | 2.4 | 3.6 | V | |
VCC,LCD_C,VLCDEXT | Supply voltage range, external LCD voltage, internal or external biasing, charge pump disabled | LCDCPEN = 0, VLCDEXT = 1 | 2.0 | 3.6 | V | |
VLCDCAP | External LCD voltage at LCDCAP, internal or external biasing, charge pump disabled | LCDCPEN = 0, VLCDEXT = 1 | 2.4 | 3.6 | V | |
CLCDCAP | Capacitor value on LCDCAP when charge pump enabled | LCDCPEN = 1, VLCDx > 0000b (charge pump enabled) | 4.7-20% | 4.7 | 10+20% | µF |
fACLK,in | ACLK input frequency range | 30 | 32.768 | 40 | kHz | |
fLCD | LCD frequency range | fFRAME = 1/(2 × mux) × fLCD with mux = 1 (static) to 8 | 0 | 1024 | Hz | |
fFRAME,4mux | LCD frame frequency range | fFRAME,4mux(MAX) = 1/(2 × 4) × fLCD(MAX) = 1/(2 × 4) × 1024 Hz | 128 | Hz | ||
fFRAME,8mux | LCD frame frequency range | fFRAME,8mux(MAX) = 1/(2 × 4) × fLCD(MAX) = 1/(2 × 8) × 1024 Hz | 64 | Hz | ||
CPanel | Panel capacitance | fLCD = 1024 Hz, all common lines equally loaded | 10000 | pF | ||
VR33 | Analog input voltage at R33 | LCDCPEN = 0, VLCDEXT = 1 | 2.4 | VCC+0.2 | V | |
VR23,1/3bias | Analog input voltage at R23 | LCDREXT = 1, LCDEXTBIAS = 1,
LCD2B = 0 |
VR13 | VR03 + 2/3 × (VR33-VR03) | VR33 | V |
VR13,1/3bias | Analog input voltage at R13 with 1/3 biasing | LCDREXT = 1, LCDEXTBIAS = 1,
LCD2B = 0 |
VR03 | VR03 + 1/3 × (VR33 – VR03) | VR23 | V |
VR13,1/2bias | Analog input voltage at R13 with 1/2 biasing | LCDREXT = 1, LCDEXTBIAS = 1,
LCD2B = 1 |
VR03 | VR03 + 1/2 × (VR33 – VR03) | VR33 | V |
VR03 | Analog input voltage at R03 | R0EXT = 1 | VSS | V | ||
VLCD-VR03 | Voltage difference between VLCD and R03 | LCDCPEN = 0, R0EXT = 1 | 2.4 | VCC+0.2 | V | |
VLCDREF | External LCD reference voltage applied at LCDREF | VLCDREFx = 01 | 0.8 | 1.0 | 1.2 | V |
Table 5-23 lists the characteristics of the LCD_C.