JAJSE27 October   2017 MSP432E401Y

PRODUCTION DATA.  

  1. 1デバイスの概要
    1. 1.1 特長
    2. 1.2 アプリケーション
    3. 1.3 概要
    4. 1.4 機能ブロック図
  2. 2改訂履歴
  3. 3Device Characteristics
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Pin Attributes
    3. 4.3 Signal Descriptions
      1. Table 4-3 Signal Descriptions
    4. 4.4 GPIO Pin Multiplexing
    5. 4.5 Buffer Type
    6. 4.6 Connections for Unused Pins
  5. 5Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Recommended DC Operating Conditions
    5. 5.5  Recommended GPIO Operating Characteristics
    6. 5.6  Recommended Fast GPIO Pad Operating Conditions
    7. 5.7  Recommended Slow GPIO Pad Operating Conditions
    8. 5.8  GPIO Current Restrictions
    9. 5.9  I/O Reliability
    10. 5.10 Current Consumption
    11. 5.11 Peripheral Current Consumption
    12. 5.12 LDO Regulator Characteristics
    13. 5.13 Power Dissipation
    14. 5.14 Thermal Resistance Characteristics, 128-Pin PDT (TQFP) Package
    15. 5.15 Timing and Switching Characteristics
      1. 5.15.1  Load Conditions
      2. 5.15.2  Power Supply Sequencing
        1. 5.15.2.1 Power and Brownout
          1. Table 5-3 Power and Brownout Levels
          2. 5.15.2.1.1 VDDA Levels
          3. 5.15.2.1.2 VDD Levels
          4. 5.15.2.1.3 VDDC Levels
          5. 5.15.2.1.4 VDD Glitch Response
          6. 5.15.2.1.5 VDD Droop Response
      3. 5.15.3  Reset Timing
        1. Table 5-4 Reset Characteristics
      4. 5.15.4  Clock Specifications
        1. 5.15.4.1 PLL Specifications
          1. Table 5-5 Phase Locked Loop (PLL) Characteristics
          2. 5.15.4.1.1 PLL Configuration
        2. 5.15.4.2 PIOSC Specifications
        3. 5.15.4.3 Low-Frequency Oscillator Specifications
          1. Table 5-9 Low-Frequency Oscillator Characteristics
        4. 5.15.4.4 Hibernation Low-Frequency Oscillator Specifications
          1. Table 5-10 Hibernation External Oscillator (XOSC) Input Characteristics
          2. Table 5-11 Hibernation Internal Low-Frequency Oscillator Clock Characteristics
        5. 5.15.4.5 Main Oscillator Specifications
          1. Table 5-12 Main Oscillator Input Characteristics
        6. 5.15.4.6 Main Oscillator Specification WIth ADC
          1. Table 5-14 System Clock Characteristics With ADC Operation
        7. 5.15.4.7 System Clock Characteristics With USB Operation
          1. Table 5-15 System Clock Characteristics With USB Operation
      5. 5.15.5  Sleep Modes
        1. Table 5-16 Wake From Sleep Characteristics
        2. Table 5-17 Wake From Deep Sleep Characteristics
      6. 5.15.6  Hibernation Module
        1. Table 5-18 Hibernation Module Battery Characteristics
        2. Table 5-19 Hibernation Module Characteristics
        3. Table 5-20 Hibernation Module Tamper I/O Characteristics
      7. 5.15.7  Flash Memory
        1. Table 5-21 Flash Memory Characteristics
      8. 5.15.8  EEPROM
        1. Table 5-22 EEPROM Characteristics
      9. 5.15.9  Input/Output Pin Characteristics
        1. Table 5-23 Fast GPIO Module Characteristics
        2. Table 5-24 Slow GPIO Module Characteristics
        3. 5.15.9.1    Types of I/O Pins and ESD Protection
          1. 5.15.9.1.1 Hibernate WAKE pin
            1. Table 5-25 Pad Voltage and Current Characteristics for Hibernate WAKE Pin
          2. 5.15.9.1.2 Nonpower I/O Pins
            1. Table 5-26 Nonpower I/O Pad Voltage and Current Characteristics
      10. 5.15.10 External Peripheral Interface (EPI)
        1. Table 5-28 EPI SDRAM Characteristics
        2. Table 5-29 EPI SDRAM Interface Characteristics
        3. Table 5-30 EPI Host-Bus 8 and Host-Bus 16 Interface Characteristics
        4. Table 5-31 EPI General-Purpose Interface Characteristics
        5. Table 5-32 EPI PSRAM Interface Characteristics
      11. 5.15.11 Analog-to-Digital Converter (ADC)
        1. Table 5-33 Electrical Characteristics for ADC at 1 Msps
        2. Table 5-34 Electrical Characteristics for ADC at 2 Msps
      12. 5.15.12 Synchronous Serial Interface (SSI)
        1. Table 5-35 SSI Characteristics
        2. Table 5-36 Bi- and Quad-SSI Characteristics
      13. 5.15.13 Inter-Integrated Circuit (I2C) Interface
        1. Table 5-37 I2C Characteristics
      14. 5.15.14 Ethernet Controller
        1. 5.15.14.1 DC Characteristics
          1. Table 5-38 Ethernet PHY DC Characteristics
        2. 5.15.14.2 Clock Characteristics for Ethernet
          1. Table 5-39 MOSC 25-MHz Crystal Specification
          2. Table 5-40 MOSC Single-Ended 25-MHz Oscillator Specification
        3. 5.15.14.3 AC Characteristics
          1. Table 5-41 Ethernet Controller Enable and Software Reset Timing
          2. Table 5-42 100Base-TX Transmit Timing
          3. Table 5-43 10Base-T Normal Link Pulse Timing
          4. Table 5-44 Auto-Negotiation Fast Link Pulse (FLP) Timing
          5. Table 5-45 100Base-TX Signal Detect Timing
      15. 5.15.15 Universal Serial Bus (USB) Controller
        1. Table 5-46 ULPI Interface Timing
      16. 5.15.16 Analog Comparator
        1. Table 5-47 Analog Comparator Characteristics
        2. Table 5-48 Analog Comparator Characteristics
        3. Table 5-49 Analog Comparator Voltage Reference Characteristics
        4. Table 5-50 Analog Comparator Voltage Reference Characteristics
      17. 5.15.17 Pulse-Width Modulator (PWM)
        1. Table 5-51 PWM Timing Characteristics
      18. 5.15.18 Emulation and Debug
        1. Table 5-52 JTAG Characteristics
  6. 6Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Arm Cortex-M4F Processor Core
      1. 6.3.1 Processor Core
      2. 6.3.2 System Timer (SysTick)
      3. 6.3.3 Nested Vectored Interrupt Controller (NVIC)
      4. 6.3.4 System Control Block (SCB)
      5. 6.3.5 Memory Protection Unit (MPU)
      6. 6.3.6 Floating-Point Unit (FPU)
    4. 6.4 On-Chip Memory
      1. 6.4.1 SRAM
      2. 6.4.2 Flash Memory
      3. 6.4.3 ROM
      4. 6.4.4 EEPROM
      5. 6.4.5 Memory Map
    5. 6.5 Peripherals
      1. 6.5.1  External Peripheral Interface (EPI)
      2. 6.5.2  Cyclical Redundancy Check (CRC)
      3. 6.5.3  Advanced Encryption Standard (AES) Accelerator
      4. 6.5.4  Data Encryption Standard (DES) Accelerator
      5. 6.5.5  Secure Hash Algorithm/Message Digest Algorithm (SHA/MD5) Accelerator
      6. 6.5.6  Serial Communications Peripherals
        1. 6.5.6.1 Ethernet MAC and PHY
        2. 6.5.6.2 Controller Area Network (CAN)
        3. 6.5.6.3 Universal Serial Bus (USB)
        4. 6.5.6.4 Universal Asynchronous Receiver/Transmitter (UART)
        5. 6.5.6.5 Inter-Integrated Circuit (I2C)
        6. 6.5.6.6 Quad Synchronous Serial Interface (QSSI)
      7. 6.5.7  System Integration
        1. 6.5.7.1 Direct Memory Access (DMA)
        2. 6.5.7.2 System Control and Clocks
        3. 6.5.7.3 Programmable Timers
        4. 6.5.7.4 Capture Compare PWM (CCP) Pins
        5. 6.5.7.5 Hibernation (HIB) Module
        6. 6.5.7.6 Watchdog Timers
        7. 6.5.7.7 Programmable GPIOs
      8. 6.5.8  Advanced Motion Control
        1. 6.5.8.1 Pulse Width Modulation (PWM)
        2. 6.5.8.2 Quadrature Encoder With Index (QEI) Module
      9. 6.5.9  Analog
        1. 6.5.9.1 ADC
        2. 6.5.9.2 Analog Comparators
      10. 6.5.10 JTAG and Arm Serial Wire Debug
      11. 6.5.11 Peripheral Memory Map
    6. 6.6 Identification
    7. 6.7 Boot Modes
  7. 7Applications, Implementation, and Layout
    1. 7.1 System Design Guidelines
  8. 8デバイスおよびドキュメントのサポート
    1. 8.1 使い始めと次の手順
    2. 8.2 デバイスの項目表記
    3. 8.3 ツールとソフトウェア
    4. 8.4 ドキュメントのサポート
    5. 8.5 Community Resources
    6. 8.6 商標
    7. 8.7 静電気放電に関する注意事項
    8. 8.8 Export Control Notice
    9. 8.9 Glossary
  9. 9メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.3.3 Nested Vectored Interrupt Controller (NVIC)

The NVIC and Cortex-M4F core prioritize and handle all exceptions in handler mode. The processor state is automatically stored to the stack on an exception and automatically restored from the stack at the end of the interrupt service routine (ISR). The interrupt vector is fetched in parallel to the state saving, enabling efficient interrupt entry. The processor supports tail-chaining, meaning that back-to-back interrupts can be performed without the overhead of state saving and restoration. Software can set 8 priority levels on 7 exceptions (system handlers) and 109 interrupts.

  • Deterministic, fast interrupt processing: always 12 cycles, or just 6 cycles with tail-chaining (these values reflect no FPU stacking)
  • External nonmaskable interrupt signal (NMI) available for immediate execution of NMI handler for safety critical applications
  • Dynamically reprioritizable interrupts
  • Exceptional interrupt handling through hardware implementation of required register manipulations

Table 6-1 lists the interrupts.

Table 6-1 Interrupts

VECTOR NUMBER INTERRUPT NUMBER (BIT IN INTERRUPT REGISTERS) VECTOR ADDRESS OR OFFSETDESCRIPTION
0 to 15 – 0x0000.0000 to 0x0000.003C Processor exceptions
16 0 0x0000.0040 GPIO Port A
17 1 0x0000.0044 GPIO Port B
18 2 0x0000.0048 GPIO Port C
19 3 0x0000.004C GPIO Port D
20 4 0x0000.0050 GPIO Port E
21 5 0x0000.0054 UART0
22 6 0x0000.0058 UART1
23 7 0x0000.005C SSI0
24 8 0x0000.0060 I2C0
25 9 0x0000.0064 PWM fault
26 10 0x0000.0068 PWM generator 0
27 11 0x0000.006C PWM generator 1
28 12 0x0000.0070 PWM generator 2
29 13 0x0000.0074 QEI0
30 14 0x0000.0078 ADC0 sequence 0
31 15 0x0000.007C ADC0 sequence 1
32 16 0x0000.0080 ADC0 sequence 2
33 17 0x0000.0084 ADC0 sequence 3
34 18 0x0000.0088 Watchdog timers 0 and 1
35 19 0x0000.008C 16-/32-Bit Timer 0A
36 20 0x0000.0090 16-/32-Bit Timer 0B
37 21 0x0000.0094 16-/32-Bit Timer 1A
38 22 0x0000.0098 16-/32-Bit Timer 1B
39 23 0x0000.009C 16-/32-Bit Timer 2A
40 24 0x0000.00A0 16-/32-Bit Timer 2B
41 25 0x0000.00A4 Analog comparator 0
42 26 0x0000.00A8 Analog comparator 1
43 27 0x0000.00AC Analog comparator 2
44 28 0x0000.00B0 System control
45 29 0x0000.00B4 Flash memory control
46 30 0x0000.00B8 GPIO port F
47 31 0x0000.00BC GPIO port G
48 32 0x0000.00C0 GPIO port H
49 33 0x0000.00C4 UART2
50 34 0x0000.00C8 SSI1
51 35 0x0000.00CC 16-/32-Bit Timer 3A
52 36 0x0000.00D0 16-/32-Bit Timer 3B
53 37 0x0000.00D4 I2C1
54 38 0x0000.00D8 CAN0
55 39 0x0000.00DC CAN1
56 40 0x0000.00E0 Ethernet MAC
57 41 0x0000.00E4 HIB
58 42 0x0000.00E8 USB MAC
59 43 0x0000.00EC PWM generator 3
60 44 0x0000.00F0 µDMA 0 Software
61 45 0x0000.00F4 µDMA 0 Error
62 46 0x0000.00F8 ADC1 sequence 0
63 47 0x0000.00FC ADC1 sequence 1
64 48 0x0000.0100 ADC1 sequence 2
65 49 0x0000.0104 ADC1 sequence 3
66 50 0x0000.0108 EPI0
67 51 0x0000.010C GPIO port J
68 52 0x0000.0110 GPIO port K
69 53 0x0000.0114 GPIO port L
70 54 0x0000.0118 SSI2
71 55 0x0000.011C SSI3
72 56 0x0000.0120 UART3
73 57 0x0000.0124 UART4
74 58 0x0000.0128 UART5
75 59 0x0000.012C UART6
76 60 0x0000.0130 UART7
77 61 0x0000.0134 I2C2
78 62 0x0000.0138 I2C3
79 63 0x0000.013C Timer 4A
80 64 0x0000.0140 Timer 4B
81 65 0x0000.0144 Timer 5A
82 66 0x0000.0148 Timer 5B
83 67 0x0000.014C Floating-Point Exception (imprecise)
84 68 – Reserved
85 69 – Reserved
86 70 0x0000.0158 I2C4
87 71 0x0000.015C I2C5
88 72 0x0000.0160 GPIO port M
89 73 0x0000.0164 GPIO port N
90 74 – Reserved
91 75 0x0000.016C Tamper
92 76 0x0000.017 GPIO port P (Summary or P0)
93 77 0x0000.0174 GPIO port P1
94 78 0x0000.0178 GPIO port P2
95 79 0x0000.017C GPIO port P3
96 80 0x0000.0180 GPIO port P4
97 81 0x0000.0184 GPIO port P5
98 82 0x0000.0188 GPIO port P6
99 83 0x0000.018C GPIO port P7
100 84 0x0000.0190 GPIO port Q (summary or Q0)
101 85 0x0000.0194 GPIO port Q1
102 86 0x0000.0198 GPIO port Q2
103 87 0x0000.019C GPIO port Q3
104 88 0x0000.01A0 GPIO port Q4
105 89 0x0000.01A4 GPIO port Q5
106 90 0x0000.01A8 GPIO port Q6
107 91 0x0000.01AC GPIO port Q7
108 92 – Reserved
109 93 – Reserved
110 94 0x0000.01B8 SHA/MD5
111 95 0x0000.01BC AES
112 96 0x0000.01C0 DES
113 97 – Reserved
114 98 0x0000.01C8 16-/32-Bit Timer 6A
115 99 0x0000.01CC 16-/32-Bit Timer 6B
116 100 0x0000.01D0 16-/32-Bit Timer 7A
117 101 0x0000.01D4 16-/32-Bit Timer 7B
118 102 0x0000.01D8 I2C6
119 103 0x0000.01DC I2C7
120 104 – Reserved
121 105 – Reserved
122 106 – Reserved
123 107 – Reserved
124 108 – Reserved
125 109 0x0000.01F4 I2C8
126 110 0x0000.01F8 I2C9
127 111 – Reserved