JAJSUK7
May 2024
MSPM0L1228-Q1
,
MSPM0L2228-Q1
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
4
機能ブロック図
5
Device Comparison
5.1
Device Comparison Chart
6
Pin Configuration and Functions
6.1
Pin Diagrams
6.2
Pin Attributes
11
6.3
Signal Descriptions
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
6.4
Connections for Unused Pins
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current Characteristics
7.5.1
RUN/SLEEP Modes
7.5.2
STOP/STANDBY Modes
7.5.3
SHUTDOWN Mode
7.6
Power Supply Sequencing
7.6.1
Power Supply Ramp
7.6.2
POR and BOR
7.7
VBat Characteristics
7.8
Flash Memory Characteristics
7.9
Timing Characteristics
7.10
Clock Specifications
7.10.1
System Oscillator (SYSOSC)
7.10.2
Low Frequency Oscillator (LFOSC)
7.10.3
High Frequency Crystal/Clock
7.10.4
Low Frequency Crystal/Clock
7.11
Digital IO
7.11.1
Electrical Characteristics
7.11.2
Switching Characteristics
7.12
Analog Mux VBOOST
7.13
ADC
7.13.1
Electrical Characteristics
7.13.2
Switching Characteristics
7.13.3
Linearity Parameters
7.13.4
Typical Connection Diagram
7.14
Temperature Sensor
7.15
VREF
7.15.1
Electrical Characteristics ADC
7.15.2
Electrical Characteristics (Comparator)
7.15.3
Voltage Characteristics (ADC)
7.15.4
Voltage Characteristics (Comparator)
7.16
Comparator (COMP)
7.16.1
Comparator Electrical Characteristics
7.17
LCD
7.18
I2C
7.18.1
I2C Characteristics
7.18.2
I2C Filter
7.18.3
I2C Timing Diagram
7.19
SPI
7.19.1
SPI
7.19.2
SPI Timing Diagram
7.20
UART
7.21
TIMx
7.22
TRNG
7.22.1
TRNG Electrical Characteristics
7.22.2
TRNG Switching Characteristics
7.23
Emulation and Debug
7.23.1
SWD Timing
8
Detailed Description
8.1
CPU
8.2
Operating Modes
8.2.1
Functionality by Operating Mode (MSPM0Lx22x)
8.3
Security
8.4
Power Management Unit (PMU)
8.5
Clock Module (CKM)
8.6
DMA
8.7
Events
8.8
Memory
8.8.1
Memory Organization
8.8.2
Peripheral File Map
8.8.3
Peripheral Interrupt Vector
8.9
Flash Memory
8.10
SRAM
8.11
GPIO
8.12
IOMUX
8.13
ADC
8.14
Temperature Sensor
8.15
LFSS
8.16
VREF
8.17
COMP
8.18
TRNG
8.19
AESADV
8.20
Keystore
8.21
CRC
8.22
UART
8.23
I2C
8.24
SPI
8.25
IWDT
8.26
WWDT
8.27
RTC_A
8.28
Timers (TIMx)
8.29
LCD
8.30
Device Analog Connections
8.31
Input/Output Diagrams
8.32
Serial Wire Debug Interface
8.33
Bootstrap Loader (BSL)
8.34
Device Factory Constants
8.35
Identification
9
Applications, Implementation, and Layout
9.1
Typical Application
9.1.1
Schematic
10
Device and Documentation Support
10.1
Getting Started and Next Steps
10.2
Device Nomenclature
10.3
Tools and Software
10.4
Documentation Support
10.5
サポート・リソース
10.6
Trademarks
10.7
静電気放電に関する注意事項
10.8
用語集
11
Revision History
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
PT|48
MTQF003C
RGE|24
MPQF124G
サーマルパッド・メカニカル・データ
発注情報
jajsuk7_oa
Table 6-16 Tamper IO (TIO) Signal Descriptions
SIGNAL NAME
PIN TYPE
DESCRIPTION
RGE PIN
RHB PIN
RGZ PIN
PT PIN
PM PIN
ZXC PIN
PN PIN
PNA PIN
TIO0
I
Passive tamper detection signal 0
11
13
13
49
G8
17
17
TIO1
I
Passive tamper detection signal 1
14
14
50
F8
18
18
TIO2
I
Passive tamper detection signal 2
15
15
51
F6
19
19