JAJSUK7 May   2024 MSPM0L1228-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 機能ブロック図
  6. 5 Device Comparison
    1. 5.1 Device Comparison Chart
  7. 6 Pin Configuration and Functions
    1. 6.1 Pin Diagrams
    2. 6.2 Pin Attributes
      1.      11
    3. 6.3 Signal Descriptions
      1.      13
      2.      14
      3.      15
      4.      16
      5.      17
      6.      18
      7.      19
      8.      20
      9.      21
      10.      22
      11.      23
      12.      24
      13.      25
      14.      26
      15.      27
      16.      28
      17.      29
    4. 6.4 Connections for Unused Pins
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Supply Current Characteristics
      1. 7.5.1 RUN/SLEEP Modes
      2. 7.5.2 STOP/STANDBY Modes
      3. 7.5.3 SHUTDOWN Mode
    6. 7.6  Power Supply Sequencing
      1. 7.6.1 Power Supply Ramp
      2. 7.6.2 POR and BOR
    7. 7.7  VBat Characteristics
    8. 7.8  Flash Memory Characteristics
    9. 7.9  Timing Characteristics
    10. 7.10 Clock Specifications
      1. 7.10.1 System Oscillator (SYSOSC)
      2. 7.10.2 Low Frequency Oscillator (LFOSC)
      3. 7.10.3 High Frequency Crystal/Clock
      4. 7.10.4 Low Frequency Crystal/Clock
    11. 7.11 Digital IO
      1. 7.11.1 Electrical Characteristics
      2. 7.11.2 Switching Characteristics
    12. 7.12 Analog Mux VBOOST
    13. 7.13 ADC
      1. 7.13.1 Electrical Characteristics
      2. 7.13.2 Switching Characteristics
      3. 7.13.3 Linearity Parameters
      4. 7.13.4 Typical Connection Diagram
    14. 7.14 Temperature Sensor
    15. 7.15 VREF
      1. 7.15.1 Electrical Characteristics ADC
      2. 7.15.2 Electrical Characteristics (Comparator)
      3. 7.15.3 Voltage Characteristics (ADC)
      4. 7.15.4 Voltage Characteristics (Comparator)
    16. 7.16 Comparator (COMP)
      1. 7.16.1 Comparator Electrical Characteristics
    17. 7.17 LCD
    18. 7.18 I2C
      1. 7.18.1 I2C Characteristics
      2. 7.18.2 I2C Filter
      3. 7.18.3 I2C Timing Diagram
    19. 7.19 SPI
      1. 7.19.1 SPI
      2. 7.19.2 SPI Timing Diagram
    20. 7.20 UART
    21. 7.21 TIMx
    22. 7.22 TRNG
      1. 7.22.1 TRNG Electrical Characteristics
      2. 7.22.2 TRNG Switching Characteristics
    23. 7.23 Emulation and Debug
      1. 7.23.1 SWD Timing
  9. 8 Detailed Description
    1. 8.1  CPU
    2. 8.2  Operating Modes
      1. 8.2.1 Functionality by Operating Mode (MSPM0Lx22x)
    3. 8.3  Security
    4. 8.4  Power Management Unit (PMU)
    5. 8.5  Clock Module (CKM)
    6. 8.6  DMA
    7. 8.7  Events
    8. 8.8  Memory
      1. 8.8.1 Memory Organization
      2. 8.8.2 Peripheral File Map
      3. 8.8.3 Peripheral Interrupt Vector
    9. 8.9  Flash Memory
    10. 8.10 SRAM
    11. 8.11 GPIO
    12. 8.12 IOMUX
    13. 8.13 ADC
    14. 8.14 Temperature Sensor
    15. 8.15 LFSS
    16. 8.16 VREF
    17. 8.17 COMP
    18. 8.18 TRNG
    19. 8.19 AESADV
    20. 8.20 Keystore
    21. 8.21 CRC
    22. 8.22 UART
    23. 8.23 I2C
    24. 8.24 SPI
    25. 8.25 IWDT
    26. 8.26 WWDT
    27. 8.27 RTC_A
    28. 8.28 Timers (TIMx)
    29. 8.29 LCD
    30. 8.30 Device Analog Connections
    31. 8.31 Input/Output Diagrams
    32. 8.32 Serial Wire Debug Interface
    33. 8.33 Bootstrap Loader (BSL)
    34. 8.34 Device Factory Constants
    35. 8.35 Identification
  10. 9 Applications, Implementation, and Layout
    1. 9.1 Typical Application
      1. 9.1.1 Schematic
  11. 10Device and Documentation Support
    1. 10.1 Getting Started and Next Steps
    2. 10.2 Device Nomenclature
    3. 10.3 Tools and Software
    4. 10.4 Documentation Support
    5. 10.5 サポート・リソース
    6. 10.6 Trademarks
    7. 10.7 静電気放電に関する注意事項
    8. 10.8 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.17 LCD

over operating free-air temperature range (unless otherwise noted)
PARAMETERS TEST CONDITIONS MIN TYP MAX UNIT
LCD Electrical Characteristics
VCC, LCD, CP en, 3.6 Supply voltage range, charge pump enabled, VLCD  ≤  3.6V LCDCPEN = 1, 0000 < VLCDx ≤ 1111, LCDREFEN = 1 (charge pump enabled, VLCD ≤ 3.6V) 1.62 3.6 V
Delta VLCD 1/4 bias mode LCDCPEN = 1, 0000 < VLCDx ≤ 1111, LCDREFEN = 1 (charge pump enabled, VLCD ≤ 3.6V) 60 mV
Delta VLCD 1/3 bias mode LCDCPEN = 1, 0000 < VLCDx ≤ 1111, LCDREFEN = 1 (charge pump enabled, VLCD ≤ 3.6V) 75 mV
VCC, LCD, ext. bias Supply voltage range, external biasing, charge pump enabled LCDCPEN = 1, LCDREFEN = 0 1.62 3.6 V
VCC, LCD, VLCDEXT Supply voltage range, external LCD voltage, external biasing, charge pump disabled LCDCPEN = 0, LCDSELVDD = 0 1.62 3.6 V
VR33 External LCD voltage at R33, external biasing, charge pump disabled LCDCPEN = 0, LCDSELVDD = 0 1.62 3.6 V
VR33 LCD voltage at R33, internal biasing, charge pump enabled LCDCPEN=1, LCDSELCDD=0, LCDREFEN=1 2.4 3.8 V
CLCDCAP +/=20% tolerance is recommended, ceramic caps X5R (Between LCDCAP0 and LCDCAP1) 0.47 µF
CR33 +/=20% tolerance is recommended, ceramic caps X5R 0.47 µF
CR23 +/=20% tolerance is recommended, ceramic caps X5R 0.47 µF
CR24 +/=20% tolerance is recommended, ceramic caps X5R 0.47 µF
CR13 +/=20% tolerance is recommended, ceramic caps X5R 0.47 µF
fFrame LCD frame frequency range fLCD = 2 × mux × fFRAME with mux = 1 (static), 2, 3, 4, 8 16 32 64 Hz
fLFCLK, in LFCLK input frequency range +/-10% accurate 32.768 kHz
CPanel Panel capacitance 32Hz frame frequency 20 nF
VR33 Analog input voltage at R33 LCDCPEN = 0, LCDSELVDD = 0, LCDREFEN =  0 1.6 3.6 V
VR23, 1/3bias Analog input voltage at R23 with 1/3 biasing LCDCPEN = 0, LCDSELVDD = 0, LCDREFEN =  0 1.1 2.4 V
VR23, 1/4bias Analog input voltage at R23 with 1/4 biasing LCDCPEN = 0, LCDSELVDD = 0, LCDREFEN =  0 1.2 2.7 V
VR24, 1/4bias Analog input voltage at R24 with 1/4 biasing LCDCPEN = 0, LCDSELVDD = 0, LCDREFEN =  0 0.8 1.8 V
VR13, 1/3bias Analog input voltage at R13 with 1/3 biasing LCDCPEN = 0, LCDSELVDD = 0, LCDREFEN =  0 0 1.2 V
VR14, 1/4bias Analog input voltage at R14 with 1/4 biasing LCDCPEN = 0, LCDSELVDD = 0, LCDREFEN =  0 0 0.9 V
VLCDREF/R13 External LCD reference voltage applied at LCDREF/R13 for 1/4 bias mode LCDCPEN = 1, LCDSELVDD = 0, LCDREFEN =  0 0.6 0.9 V
VLCDREF/R13 External LCD reference voltage applied at LCDREF/R13 for 1/3 bias mode LCDCPEN = 1, LCDSELVDD = 0, LCDREFEN =  0 0.8 1.2 V
Tamb Operating Temperature Range TBD -40 25 125 deg C
IDD STBY Stand by power - External Biasing (Mode 0), Vboost = OFF. External resistor ladder. 5% matched tolerance and less than 1% individual tolerance Vdd>=2.4V,LCDCPEN =0, LCDSELVDD=0,LCDSEL_VDD_R33=0,LCDINTBIASEN=0,LVDVERFEN=0, Vboost= OFF, External Supply on 202 nA
IDD STBY Stand by power  - External Biasing (Mode 0), Vboost = ON, External resistor ladder. Current through resistor ladder is not accounted in spec.  5% matched tolerance and less than 1% individual tolerance Vdd<2.4V,LCDCPEN =0, LCDSELVDD=0,LCDSEL_VDD_R33=0,LCDINTBIASEN=0,LVDVERFEN=0, Vboost= ON, External Supply on 652 nA
IDD STBY Stand by power  - Internal Biasing (Mode 1). Enable VDD connection to R33 pin and add external resistor ladder.Current through resistor ladder is not accounted in spec LCDCPEN =0, LCDSELVDD=1,LCDSEL_VDD_R33=0,LCDINTBIASEN=0, LCDVREFEN =0( Internal reference disabled),Vboost= OFF, External Supply Off TBD nA
IDD STBY Stand by power  - External Biasing (Mode 2). Check for LCD_HP_LP=0/1 and LCDBIASSEL=0/1 LCDCPEN =0, LCDSELVDD=0,LCDSEL_VDD_R33=0,LCDINTBIASEN=1, LCDVREFEN =0( Internal reference disabled),Vboost= OFF, External Supply on 202   nA
IDD STBY Stand by power - Internal Biasing (Mode 3). Check for LCD_HP_LP=0/1 and LCDBIASSEL=0/1. AVDD connected to internal ladder used to generate voltages LCDCPEN =0, LCDSELVDD=0,LCDSEL_VDD_R33=1,LCDINTBIASEN=1, LCDVREFEN =0( Internal reference disabled),Vboost= OFF, External Supply off 57 µA
IDD STBY Stand by power  - External Biasing (Mode 4). Check for LCDBIASSEL=0/1. Vext connected to R33. CP used to generate voltage fractions LCDCPEN =1, LCDSELVDD=0,LCDSEL_VDD_R33=0,LCDINTBIASEN=0, LCDVREFEN =0( Internal reference disabled),Vboost= OFF, External Supply on 202 nA
IDD STBY Stand by power  - Internal Biasing (Mode 5). Check for LCDBIASSEL=0/1.AVDD connected to R33. CP used to generate voltage fractions. LOADCAP0/1 are connected LCDCPEN =0,LCDCPFSELx=0x2 LCDSELVDD=1,LCDSEL_VDD_R33=1,LCDINTBIASEN=0, LCDVREFEN =0( Internal reference disabled),Vboost= OFF, External Supply off 300 nA
IDD STBY Stand by power - External Biasing (Mode 6). CP used to generate 1/3 and 1/4 voltage fractions. Vext connected to R13. LOADCAP0/1 are connected LCDCPEN =1, LCDSELVDD=0,LCDSEL_VDD_R33=1,LCDINTBIASEN=0, LCDVREFEN =0( Internal reference disabled),Vboost= OFF, External Supply on 202 nA
IDD STBY Stand by power - Internal Biasing (Mode 7). CP used to generate 1/3 and 1/4 voltage fractions.  LOADCAP0/1 are connected. Vboost = OFF LCDCPEN =1,LCDCPFSELx=0x2,VLCDx=3V LCDSELVDD=0,LCDSEL_VDD_R33=1,LCDINTBIASEN=0, LCDVREFEN =1( Internal reference enabled),LCDREFMODE =0/1 1.2 µA
IDD STBY Stand by power - Internal Biasing (Mode 7). CP used to generate 1/3 and 1/4 voltage fractions.  LOADCAP0/1 are connected. Vboost = ON LCDCPEN =1,LCDCPFSELx=0x2,VLCDx=3V LCDSELVDD=0,LCDSEL_VDD_R33=1,LCDINTBIASEN=0, LCDVREFEN =1( Internal reference enabled),LCDREFMODE =0/1 1.5 µA