JAJSDV8E August 2011 – January 2017 OMAP-L132
PRODUCTION DATA.
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
SIGNAL | TYPE(1) | PULL(2) | POWER
GROUP(3) |
DESCRIPTION | |
---|---|---|---|---|---|
NAME | NO. | ||||
SPI0 | |||||
SPI0_CLK / EPWM0A / GP1[8] / MII_RXCLK | D19 | I/O | CP[7] | A | SPI0 clock |
SPI0_ENA / EPWM0B / PRU0_R30[6] / MII_RXDV | C17 | I/O | CP[7] | A | SPI0 enable |
SPI0_SCS[0] / TM64P1_OUT12 / GP1[6] / MDIO / TM64P1_IN12 | D17 | I/O | CP[10] | A | SPI0 chip selects |
SPI0_SCS[1] / TM64P0_OUT12 / GP1[7] / MDCLK / TM64P0_IN12 | E16 | I/O | CP[10] | A | |
SPI0_SCS[2] / UART0_RTS / GP8[1] / MII_RXD[0] | D16 | I/O | CP[9] | A | |
SPI0_SCS[3] / UART0_CTS / GP8[2] / MII_RXD[1] | E17 | I/O | CP[9] | A | |
SPI0_SCS[4] / UART0_TXD / GP8[3] / MII_RXD[2] | D18 | I/O | CP[8] | A | |
SPI0_SCS[5] / UART0_RXD / GP8[4] / MII_RXD[3] | C19 | I/O | CP[8] | A | |
SPI0_SIMO / EPWMSYNCO / GP8[5] / MII_CRS | C18 | I/O | CP[7] | A | SPI0 data slave-in-master-out |
SPI0_SOMI / EPWMSYNCI / GP8[6] / MII_RXER | C16 | I/O | CP[7] | A | SPI0 data slave-out-master-in |
SPI1 | |||||
SPI1_CLK / GP2[13] | G19 | I/O | CP[15] | A | SPI1 clock |
SPI1_ENA / GP2[12] | H16 | I/O | CP[15] | A | SPI1 enable |
SPI1_SCS[0] / EPWM1B / PRU0_R30[7] / GP2[14] / TM64P3_IN12 | E19 | I/O | CP[14] | A | SPI1 chip selects |
SPI1_SCS[1] / EPWM1A / PRU0_R30[8] / GP2[15] / TM64P2_IN12 | F18 | I/O | CP[14] | A | |
SPI1_SCS[2] / UART1_TXD / GP1[0] | F19 | I/O | CP[13] | A | |
SPI1_SCS[3] / UART1_RXD / GP1[1] | E18 | I/O | CP[13] | A | |
SPI1_SCS[4] / UART2_TXD / I2C1_SDA / GP1[2] | F16 | I/O | CP[12] | A | |
SPI1_SCS[5] / UART2_RXD / I2C1_SCL / GP1[3] | F17 | I/O | CP[12] | A | |
SPI1_SCS[6] / I2C0_SDA / TM64P3_OUT12 / GP1[4] | G18 | I/O | CP[11] | A | |
SPI1_SCS[7] / I2C0_SCL / TM64P2_OUT12 / GP1[5] | G16 | I/O | CP[11] | A | |
SPI1_SIMO / GP2[10] | G17 | I/O | CP[15] | A | SPI1 data slave-in-master-out |
SPI1_SOMI / GP2[11] | H17 | I/O | CP[15] | A | SPI1 data slave-out-master-in |