JAJSQ23H september   1983  – march 2023 OP07 , OP07C , OP07D

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 説明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Offset-Voltage Null Capability
      2. 7.3.2 Slew Rate
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Swing
        2. 8.2.2.2 Supply and Input Voltage
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 ドキュメントの更新通知を受け取る方法
    2. 9.2 サポート・リソース
    3. 9.3 Trademarks
    4. 9.4 静電気放電に関する注意事項
    5. 9.5 用語集
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
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サーマルパッド・メカニカル・データ
発注情報

6.5 Electrical Characteristics

at TA = 25°C, VS = ±15 V, RL = 2 kΩ connected to mid-supply, and VCM = VOUT = mid-supply (unless otherwise noted)(1).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage  OP07C ±60 μV
TA = 0°C to 70°C ±85
OP07D ±150
TA = 0°C to 70°C ±250
dVOS/dT Input offset voltage drift TA = 0°C to 70°C OP07C ±0.5 μV/°C
OP07D ±2.5
Long-term drift of input offset voltage(2) ±0.4 µV/mo
Offset adjustment range Rs = 20 kΩ, see Section 8.1 ±4 mV
PSRR Power supply rejection ratio  VS = ±3 V to ±18 V 7 32 μV/V
TA = 0°C to 70°C 10 51
INPUT BIAS CURRENT
IB Input bias current OP07C ±1.8 nA
TA = 0°C to 70°C ±2.2
OP07D ±12
TA = 0°C to 70°C ±14
Input bias current drift OP07C ±18 pA/°C
OP07D ±50
IOS Input offset current OP07C ±0.8 nA
TA = 0°C to 70°C ±1.6
OP07D ±6
TA = 0°C to 70°C ±8
Input offset current drift OP07C 12 pA/°C
OP07D ±50
NOISE
  Input voltage noise f = 0.1 Hz to 10 Hz   0.38   μVPP
eN Input voltage noise density  f = 10 Hz   10.5   nV/√Hz
f = 100 Hz   10.2  
f = 1 kHz   9.8  
Input current noise f = 0.1 Hz to 10 Hz 15 pApp
iN Input current noise density  f = 10 Hz 0.35 pA/√Hz
f = 100 Hz 0.15
f = 1 kHz   0.13  
INPUT VOLTAGE RANGE
VCM Common-mode voltage ±13 ±14 V
TA = 0°C to 70°C ±13 ±13.5
CMRR Common-mode rejection ratio OP07C
VCM = ±13 V		 100 120 dB
TA = 0°C to 70°C 97 120
OP07D
VCM = ±13 V		 94 110
TA = 0°C to 70°C 94 106
INPUT CAPACITANCE
rI Input resistance 7 33 MΩ
OPEN-LOOP GAIN
AOL Open-loop voltage gain  1.4 V < VO < 11.4 V,
RL = 500 kΩ		 OP07C 100 400 V/mV
OP07D 400
VO = ±10 V 120 400
TA = –40°C to +125°C 100 400
FREQUENCY RESPONSE
Unity gain bandwidth 0.4 0.6 MHz
SR Slew rate VS = 5 V, RL = 2 kΩ 0.3 V/μs
OUTPUT
Voltage output swing  ±11.5 ±12.8 V
TA = 0°C to 70°C ±11 ±12.6
RL = 10 kΩ ±12 ±13
RL = 1 kΩ ±12
POWER SUPPLY
PD Power dissipation No load 80 150 mW
VS = ±3 V, no load 4 8
(1) The specifications listed in the Electrical Characteristics apply to OP07C and OP07D.
(2) Because long-term drift cannot be measured on the individual devices before shipment, this specification is not intended to be a warranty. This specification is an engineering estimate of the averaged trend line of drift versus time over extended periods after the first 30 days of operation.