JAJSH26C March   2019  – September 2022 OPA1655 , OPA1656

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA1655
    5. 6.5 Thermal Information: OPA1656
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Phase Reversal Protection
      2. 7.3.2 Electrical Overstress
      3. 7.3.3 EMI Rejection Ratio (EMIRR)
        1. 7.3.3.1 EMIRR IN+ Test Configuration
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Basic Noise Calculations
    2. 8.2 Typical Applications
      1. 8.2.1 Preamplifier Circuit for Vinyl Record Playback With Moving-Magnet Phono Cartridges
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Composite Headphone Amplifier
        1. 8.2.2.1 Application Curves
      3. 8.2.3 Baxandall Tone Control
        1. 8.2.3.1 Application Curves
      4. 8.2.4 Guitar Input to XLR Output
        1. 8.2.4.1 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 Power Dissipation
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™シミュレーション・ソフトウェア (無償ダウンロード)
        3. 9.1.1.3 DIP アダプタ評価基板
        4. 9.1.1.4 DIYAMP-EVM
        5. 9.1.1.5 TI のリファレンス・デザイン
        6. 9.1.1.6 フィルタ設計ツール
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Electrical Characteristics

at TA = 25°C, VS = ±18 V, RL = 2 kΩ, and VCM = VOUT = VS/2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AUDIO PERFORMANCE
THD+N Total harmonic distortion + noise G = 1, RL = 600 Ω, VO = 3.5 VRMS, f = 1 kHz,
80-kHz measurement bandwidth		 0.000029%
–131 dB
G = 1, RL = 600 Ω, VO = 3.5 VRMS, f = 20 kHz,
80-kHz measurement bandwidth		 0.0001%
–120 dB
G = 1, RL = 2 kΩ, VO = 3.5 VRMS, f = 1 kHz,
80-kHz measurement bandwidth		 0.000029%
–131 dB
G = 1, RL = 2 kΩ, VO = 3.5 VRMS, f = 20 kHz,
80-kHz measurement bandwidth		 0.000035%
–129 dB
IMD Intermodulation distortion G = 1
VO = 3.5 VRMS		 SMPTE/DIN two-tone, 4:1
(60 Hz and 7 kHz)		 0.000018%
–135 dB
CCIF twin-tone
(19 kHz and 20 kHz)		 0.000020%
–134 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product G = 100 53 MHz
Unity gain bandwidth G = 1 20 MHz
SR Slew rate G = –1, 10-V step 24 V/µs
Full-power bandwidth(1) VO = 1 VP 3.8 MHz
Overload recovery time G = –10 100 ns
Channel separation f = 1 kHz –135 dB
Settling time 0.01%, G = –1, 10-V step 800 ns
NOISE
Input voltage noise f = 20 Hz to 20 kHz 0.53 µVRMS
f = 0.1 Hz to 10 Hz 1.9 µVPP
en Input voltage noise density f = 100 Hz 11.8 nV/√Hz
f = 1 kHz 4.3 nV/√Hz
f = 10 kHz 2.9
in Input current noise density f = 1 kHz 6 fA/√Hz
OFFSET VOLTAGE
VOS Input offset voltage VS = ±2.25 V to ±18 V ±0.5 ±1 mV
dVOS/dT Input offset voltage drift(2) VS = ±2.25 V to ±18 V
TA = –40°C to +125°C		 0.3 2 µV/°C
PSRR Power-supply rejection ratio VS = ±2.25 V to ±18 V 0.3 5 µV/V
INPUT BIAS CURRENT
IB Input bias current(3) VCM = 0 V OPA1655 ±10 pA
OPA1656 ±10 ±20
IOS Input offset current VCM = 0 V OPA1655 ±10 pA
OPA1656 ±10 ±20
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) (V+) – 2.25 V
CMRR Common-mode rejection ratio (V–) ≤ VCM ≤ (V+) – 2.25 106 120 dB
INPUT IMPEDANCE
Differential 100 || 9.1 MΩ || pF
Common-mode 6 || 1.9 1012Ω || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 1.3 V ≤ VO ≤ (V+) – 1.3 V
RL = 600 Ω		 134 150 dB
(V–) + 0.5 V ≤ VO ≤ (V+) – 0.5 V
RL = 2 kΩ		 134 154
OUTPUT
VO Voltage output (V–) + 0.25 (V+) – 0.25 V
ZO Open-loop output impedance f = 1 MHz 26 Ω
ISC Short-circuit current(4) ±100 mA
CL Capacitive load drive 100 pF
POWER SUPPLY
IQ Quiescent current (per channel) IO = 0 A, VS = ±2.25 V to ±18 V 3.9 4.6 mA
IO = 0 A, TA = –40°C to +125°C(2) 5.0
(1) Full-power bandwidth = SR / (2π × VP), where SR = slew rate.
(2) Specified by design and characterization.
(3) Input bias current test conditions can vary from nominal ambient conditions as a result of junction temperature differences.
(4) One channel at a time.