JAJSCO9B December   2016  – November 2017 OPA170-Q1 , OPA2170-Q1 , OPA4170-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA170-Q1
    5. 6.5 Thermal Information: OPA2170-Q1
    6. 6.6 Thermal Information: OPA4170-Q1
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics: Table of Graphs
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Electrical Overstress
      4. 7.3.4 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
      2. 7.4.2 Overload Recovery
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 TINA-TI™ (無料のダウンロード・ソフトウェア)
        2. 11.1.1.2 DIPアダプタ評価モジュール
        3. 11.1.1.3 ユニバーサル・オペアンプ評価モジュール
        4. 11.1.1.4 TI Precision Designs
        5. 11.1.1.5 WEBENCHFilter Designer
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage –20 20 V
Single supply voltage 40 V
Signal input pin voltage (V–) – 0.5 (V+) + 0.5 V
Signal input pin current –10 10 mA
Output short-circuit current(2) Continuous
Operating ambient temperature, TA –55 150 °C
Junction temperature, TJ 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to ground, one amplifier per package.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±4000 V
Charged-device model (CDM), per AEC Q100-011 ±750
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VS Supply voltage (V+ – V–) 2.7 36 V
TA Operating temperature –40 125 °C

6.4 Thermal Information: OPA170-Q1

THERMAL METRIC(1) OPA170-Q1 UNIT
DBV (SOT-23)
5 PINS
RθJA Junction-to-ambient thermal resistance 245.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 133.9 °C/W
RθJB Junction-to-board thermal resistance 83.6 °C/W
ψJT Junction-to-top characterization parameter 18.2 °C/W
ψJB Junction-to-board characterization parameter 83.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Thermal Information: OPA2170-Q1

THERMAL METRIC(1) OPA2170-Q1 UNIT
DGK (VSSOP)
8 PINS
RθJA Junction-to-ambient thermal resistance 180 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 55 °C/W
RθJB Junction-to-board thermal resistance 130 °C/W
ψJT Junction-to-top characterization parameter 5.3 °C/W
ψJB Junction-to-board characterization parameter 120 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.6 Thermal Information: OPA4170-Q1

THERMAL METRIC(1) OPA4170-Q1 UNIT
PW (TSSOP)
14 PINS
RθJA Junction-to-ambient thermal resistance 106.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 24.4 °C/W
RθJB Junction-to-board thermal resistance 59.3 °C/W
ψJT Junction-to-top characterization parameter 0.6 °C/W
ψJB Junction-to-board characterization parameter 54.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.7 Electrical Characteristics

at TA = 25°C, VCM = VOUT = VS / 2, and RL = 10 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage TA = 25°C 0.25 ±1.8 mV
TA = –40°C to 125°C ±2 mV
dVOS/dT Input offset voltage drift TA = –40°C to 125°C ±0.3 ±2 µV/°C
PSRR Input offset voltage vs power supply VS = 4 V to 36 V
TA = –40°C to 125°C		 1 ±5 µV/V
Channel separation, dc 5 µV/V
INPUT BIAS CURRENT
IB Input bias current TA = 25°C ±8 ±15 pA
TA = –40°C to 125°C (OPA170-Q1 and OPA2170-Q1) ±3.5 nA
TA = –40°C to 125°C (OPA4170-Q1) ±16
IOS Input offset current TA = 25°C ±4 ±15 pA
TA = –40°C to 125°C (OPA170-Q1 and OPA2170-Q1) ±3.5 nA
TA = –40°C to 125°C (OPA4170-Q1) ±16
NOISE
Input voltage noise ƒ = 0.1 Hz to 10 Hz 2 µVPP
en Input voltage noise density ƒ = 100 Hz 22 nV/√Hz
ƒ = 1 kHz 19 nV/√Hz
INPUT VOLTAGE
VCM Common-mode voltage range(1) (V–) – 0.1 (V+) – 2 V
CMRR Common-mode rejection ratio VS = ±2 V, (V–) – 0.1 V < VCM < (V+) – 2 V
TA = –40°C to 125°C		 90 104 dB
VS = ±18 V, (V–) – 0.1 V < VCM < (V+) – 2 V
TA = –40°C to 125°C		 104 120 dB
INPUT IMPEDANCE
Differential 100 || 3 MΩ || pF
Common-mode 6 || 3 1012 Ω || pF
OPEN-LOOP GAIN
AOL Open-loop voltage gain VS = 4 V to 36 V
(V–) + 0.35 V < VO < (V+) – 0.35 V
TA = –40°C to 125°C		 110 130 dB
FREQUENCY RESPONSE
GBP Gain bandwidth product 1.2 MHz
SR Slew rate G = 1 0.4 V/µs
tS Settling time To 0.1%, VS = ±18 V, G = 1 10-V step 20 µs
To 0.01% (12-bit), VS = ±18 V, G = 1
10-V step		 28 µs
Overload recovery time VIN × Gain > VS 2 µs
THD+N Total harmonic distortion + noise G = 1, ƒ = 1 kHz, VO = 3 VRMS 0.0002%
OUTPUT
VO Voltage output swing from positive rail IL = 0 mA
VS = 4 V to 36 V		 10 mV
IL sourcing 1 mA
VS = 4 V to 36 V		 115 mV
VO Voltage output swing from negative rail IL = 0 mA
VS = 4 V to 36 V		 8 mV
IL sinking 1 mA
VS = 4 V to 36 V		 70 mV
VO Voltage output swing from rail VS = 5 V
RL = 10 kΩ
TA = –40°C to 125°C		 (V–) + 0.03 (V+) – 0.05 V
RL = 10 kΩ
AOL ≥ 110 dB
TA = –40°C to 125°C		 (V–) + 0.35 (V+) – 0.35 V
ISC Short-circuit current –20 17 mA
CLOAD Capacitive load drive See Typical Characteristics pF
RO Open-loop output resistance ƒ = 1 MHz
IO = 0 A		 900 Ω
POWER SUPPLY
VS Specified voltage range 2.7 36 V
IQ Quiescent current per amplifier IO = 0 A
TA = 25°C		 110 145 µA
IO = 0 A
TA = –40°C to 125°C		 155 µA
TEMPERATURE
Specified range –40 125 °C
Operating range –55 150 °C
(1) The input range can be extended beyond (V+) – 2 V up to V+. For additional information, see Typical Characteristics and Application and Implementation.

6.8 Typical Characteristics: Table of Graphs

Table 4. Characteristic Performance Measurements

DESCRIPTION FIGURE
Offset Voltage Production Distribution Figure 1
Offset Voltage Drift Distribution Figure 2
Offset Voltage vs Temperature Figure 3
Offset Voltage vs Common-Mode Voltage Figure 4
Offset Voltage vs Common-Mode Voltage (Upper Stage) Figure 5
Offset Voltage vs Power Supply Figure 6
IB and IOS vs Common-Mode Voltage Figure 7
Input Bias Current vs Temperature Figure 8
Output Voltage Swing vs Output Current (Maximum Supply) Figure 9
CMRR and PSRR vs Frequency (Referred-to-Input) Figure 10
CMRR vs Temperature Figure 11
PSRR vs Temperature Figure 12
0.1-Hz to 10-Hz Noise Figure 13
Input Voltage Noise Spectral Density vs Frequency Figure 14
THD+N Ratio vs Frequency Figure 15
THD+N vs Output Amplitude Figure 16
Quiescent Current vs Temperature Figure 17
Quiescent Current vs Supply Voltage Figure 18
Open-Loop Gain and Phase vs Frequency Figure 19
Closed-Loop Gain vs Frequency Figure 20
Open-Loop Gain vs Temperature Figure 21
Open-Loop Output Impedance vs Frequency Figure 22
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) Figure 23, Figure 24
No Phase Reversal Figure 25
Positive Overload Recovery Figure 26
Negative Overload Recovery Figure 27
Small-Signal Step Response (100 mV) Figure 28, Figure 29
Large-Signal Step Response Figure 30, Figure 31
Large-Signal Settling Time (10-V Positive Step) Figure 32
Large-Signal Settling Time (10-V Negative Step) Figure 33
Short-Circuit Current vs Temperature Figure 34
Maximum Output Voltage vs Frequency Figure 35
EMIRR IN+ vs Frequency Figure 36

6.9 Typical Characteristics

VS = ±18 V, VCM = VS / 2, RLOAD = 10 kΩ connected to VS / 2, and CL = 100 pF (unless otherwise noted)
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G001_bos834.gif
Figure 1. Offset Voltage Production Distribution
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G003_BOS557.png
Figure 3. Offset Voltage vs Temperature
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G005_BOS557.gif
Figure 5. Offset Voltage vs Common-Mode Voltage
(Upper Stage)
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G007_BOS557.gif
Figure 7. IB and IOS vs Common-Mode Voltage
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G009_BOS557.gif
Figure 9. Output Voltage Swing vs Output Current (Maximum Supply)
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G011_BOS557.gif
Figure 11. CMRR vs Temperature
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G013_bos834.gif
Figure 13. 0.1-Hz to 10-Hz Noise
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G015_bos834.gif
Figure 15. THD + N Ratio vs Frequency
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G017_SBOS834.gif
Figure 17. Quiescent Current vs Temperature
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G019_BOS557.gif
Figure 19. Open-Loop Gain and Phase vs Frequency
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G021_BOS557.gif
Figure 21. Open-Loop Gain vs Temperature
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G023_BOS557.gif
100-mV output step
Figure 23. Small-Signal Overshoot vs Capacitive Load
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G025_BOS557.gif
Figure 25. No Phase Reversal
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G027_BOS557.gif
Figure 27. Negative Overload Recovery
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G029_BOS557.gif
Figure 29. Small-Signal Step Response (100-mV)
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G031_BOS557.gif
Figure 31. Large-Signal Step Response
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G033_BOS557.gif
10-V negative step
Figure 33. Large-Signal Settling Time
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G035_BOS557.png
Figure 35. Maximum Output Voltage vs Frequency
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G002_bos834.gif
Figure 2. Offset Voltage Drift Distribution
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G004_BOS557.gif
Figure 4. Offset Voltage vs Common-Mode Voltage
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G006_SBOS834.gif
Figure 6. Offset Voltage vs Power Supply
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G008_BOS557.gif
Figure 8. Input Bias Current vs Temperature for Single and Dual Versions
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G010_BOS557.gif
Figure 10. CMRR and PSRR vs Frequency
(Referred to Input)
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G012_SBOS834.gif
Figure 12. PSRR vs Temperature
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G014_BOS557.png
Figure 14. Input Voltage Noise Spectral Density vs Frequency
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G016_bos834.gif
Figure 16. THD + N vs Output Amplitude
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G018_bos834.gif
Figure 18. Quiescent Current vs Supply Voltage
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G020_BOS557.gif
Figure 20. Closed-Loop Gain vs Frequency
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G022_bos834.gif
Figure 22. Open-Loop Output Impedance vs Frequency
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G024_BOS557.gif
100-mV output step
Figure 24. Small-Signal Overshoot vs Capacitive Load
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G026_BOS557.gif
Figure 26. Positive Overload Recovery
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G028_BOS557.gif
Figure 28. Small-Signal Step Response (100-mV)
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G030_BOS557.gif
Figure 30. Large-Signal Step Response
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G032_BOS557.gif
10-V positive step
Figure 32. Large-Signal Settling Time
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G034_BOS557.png
10-V negative step
Figure 34. Short-Circuit Current vs Temperature
OPA170-Q1 OPA2170-Q1 OPA4170-Q1 G036_BOS557.gif
Figure 36. EMIRR IN+ vs Frequency