JAJSCO9B December   2016  – November 2017 OPA170-Q1 , OPA2170-Q1 , OPA4170-Q1

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA170-Q1
    5. 6.5 Thermal Information: OPA2170-Q1
    6. 6.6 Thermal Information: OPA4170-Q1
    7. 6.7 Electrical Characteristics
    8. 6.8 Typical Characteristics: Table of Graphs
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 Phase-Reversal Protection
      3. 7.3.3 Electrical Overstress
      4. 7.3.4 Capacitive Load and Stability
    4. 7.4 Device Functional Modes
      1. 7.4.1 Common-Mode Voltage Range
      2. 7.4.2 Overload Recovery
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 開発サポート
        1. 11.1.1.1 TINA-TI™ (無料のダウンロード・ソフトウェア)
        2. 11.1.1.2 DIPアダプタ評価モジュール
        3. 11.1.1.3 ユニバーサル・オペアンプ評価モジュール
        4. 11.1.1.4 TI Precision Designs
        5. 11.1.1.5 WEBENCHFilter Designer
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 関連リンク
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The OPAx170-Q1 family of operational amplifiers provides high overall performance in a large number of general-purpose applications. As with all amplifiers, applications with noisy or high-impedance power supplies require decoupling capacitors placed close to the device pins. In most cases, capacitors with a value of 0.1 µF are adequate. Follow the additional recommendations in the Layout Guidelines section to achieve the maximum performance from this device. Many applications may introduce capacitive loading to the output of the amplifier that may cause instability. Adding an isolation resistor between the amplifier output and the capacitive load stabilizes the amplifier. The design process for selecting this resistor is shown in the Typical Application section.

8.2 Typical Application

This circuit can drive capacitive loads such as cable shields, reference buffers, MOSFET gates, and diodes. The circuit uses an isolation resistor (RISO) to stabilize the output of an operational amplifier. RISO modifies the open-loop gain of the system to ensure the circuit has sufficient phase margin.

OPA170-Q1 OPA2170-Q1 OPA4170-Q1 ai_refdes_blockdia_bos618.gif Figure 41. Unity-Gain Buffer With RISO Stability Compensation

8.2.1 Design Requirements

The design requirements are:

  • Supply voltage: 30 V (±15 V)
  • Capacitive loads: 100-pF, 1000-pF, 0.01-μF, 0.1-μF, and 1-μF
  • Phase margin: 45° and 60°

8.2.2 Detailed Design Procedure

Figure 41 shows a unity-gain buffer driving a capacitive load. Equation 1 shows the transfer function for the circuit in Figure 41. Not shown in Figure 41 is the open-loop output resistance of the operational amplifier, RO.

Equation 1. OPA170-Q1 OPA2170-Q1 OPA4170-Q1 ai_refdes_eqn_bos618.gif

The transfer function in Equation 1 has a pole and a zero. The frequency of the pole (fp) is determined by (RO + RISO) and CLOAD. RISO and CLOAD determine the frequency of the zero (fz). A stable system is obtained by selecting RISO, so the rate of closure (ROC) between the open-loop gain (AOL) and 1/β is 20 dB / decade. Figure 42 depicts the concept. The 1/β curve for a unity-gain buffer is 0 dB.

OPA170-Q1 OPA2170-Q1 OPA4170-Q1 ai_refdes_bodeplot_bos618.gif Figure 42. Unity-Gain Amplifier With RISO Compensation

ROC stability analysis is typically simulated. The validity of the analysis depends on multiple factors, especially the accurate modeling of R O . In addition to simulating the ROC, a robust stability analysis includes a measurement of overshoot percentage and ac gain peaking of the circuit using a function generator, oscilloscope, and gain and phase analyzer. Phase margin is then calculated from these measurements. Table 6 shows the overshoot percentage and ac gain peaking that correspond to 45° and 60° phase margins. For more details on this design and other alternative devices that can be used in place of the OPAx170-Q1 family, see Capacitive Load Drive Solution Using an Isolation Resistor.

Table 6. Phase Margin versus Overshoot and AC Gain Peaking

PHASE MARGIN OVERSHOOT AC GAIN PEAKING
45° 23.3% 2.35 dB
60° 8.8% 0.28 dB

8.2.3 Application Curve

Using the described methodology, the values of RISO that yield phase margins of 45º and 60º for various capacitive loads were determined. Figure 43 shows the results.

OPA170-Q1 OPA2170-Q1 OPA4170-Q1 C002_SBOS557.png Figure 43. Isolation Resistor Required for Various Capacitive Loads to Achieve a Target Phase Margin