SBOS620E December   2013  – November 2015 OPA192 , OPA2192 , OPA4192

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information: OPA192
    5. 6.5  Thermal Information: OPA2192
    6. 6.6  Thermal Information: OPA4192
    7. 6.7  Electrical Characteristics: VS = ±4 V to ±18 V (VS = +8 V to +36 V)
    8. 6.8  Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = +4.5 V to +8 V)
    9. 6.9  Typical Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Input Offset Voltage Drift
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Input Protection Circuitry
      2. 8.3.2 EMI Rejection
      3. 8.3.3 Phase Reversal Protection
      4. 8.3.4 Thermal Protection
      5. 8.3.5 Capacitive Load and Stability
      6. 8.3.6 Common-Mode Voltage Range
      7. 8.3.7 Electrical Overstress
      8. 8.3.8 Overload Recovery
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 16-Bit Precision Multiplexed Data-Acquisition System
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Slew Rate Limit for Input Protection
      3. 9.2.3 Precision Reference Buffer
  10. 10Power-Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
        1. 12.1.1.1 TINA-TI (Free Software Download)
        2. 12.1.1.2 TI Precision Designs
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 Revision History

Changes from D Revision (September 2015) to E Revision

  • Changed PW package from product preview to production dataGo
  • Added PW package to test condition for input offset voltage driftGo
  • Added PW package to test condition for input offset voltage driftGo
  • Added PW package condition to Figure 8 Go
  • Added PW package condition to Figure 10 Go
  • Added PW package condition to Figure 52 Go
  • Changed Figure 70 to fix typosGo

Changes from C Revision (March 2015) to D Revision

  • Changed device status to Production Data; OPA4192 released to Production Go
  • Deleted footnote 2 from Device Information table Go
  • Deleted footnote 2 from Pin Configuration and Functions sectionGo
  • Changed ESD Ratings table: added correct OPA4192 CDM specifications Go
  • Added Frequency Response, Crosstalk parameter to Electrical Characteristics: VS = ±4 V to ±18 V table Go
  • Added Frequency Response, Crosstalk parameter to Electrical Characteristics: VS = ±2.25 V to ±4 V table Go
  • Changed Typical Characteristics to current standards (split curves and table of graphs into separate sections to be SDS compliant) Go
  • Added Crosstalk vs Frequency row to Table 1 Go
  • Added Figure 48 Go

Changes from B Revision (March 2014) to C Revision

  • Added CDM row for OPA2192, OPA4192 in ESD Ratings tableGo
  • Changed input offset voltage values for VCM ≥ (V+) – 1.5 V test conditionGo
  • Changed Input offset voltage parameter typical specs for VCM = (V+) – 1.5 V test conditions Go
  • Changed test conditions for dVOS/dT parameterGo
  • Changed input offset voltage max values and test conditions for VCM = (V+) – 3 V test conditionGo
  • Changed input offset voltage values and test conditions for VCM = (V+) – 1.5 V test conditionGo
  • Changed Input offset voltage parameter typical specs for VCM = (V+) – 1.5 V test conditionsGo
  • Changed test conditions for dVOS/dT parameter Go
  • Added text to last bullet of Layout Guidelines sectionGo

Changes from A Revision (January 2014) to B Revision

  • Added ESD Ratings and Recommended Operating Conditions tables, and Parameter Measurement Information, Application and Implementation, Power-Supply Recommendations, and Device and Documentation Support sections, and moved existing sectionsGo
  • Changed all OPA192 and OPA2192 packages to production data.Go
  • Changed package names to latest standard; changed all MSOP to VSSOP, SO to SOIC, and SOT23 to SOT Go
  • Deleted DCK package pin configurationGo
  • Added thermal information for OPA192 DBV and DGK packagesGo
  • Added OPA2192 and OPA4192 Thermal Information tables Go
  • Added rows with additional test conditions to input offset voltage parameterGo
  • Changed Input offset voltage drift parameter Go
  • Changed CMRR test conditions Go
  • Added rows with additional test conditions to input offset voltage parameterGo
  • Changed Input offset voltage drift parameterGo
  • Changed PSSR parameter Go
  • Changed CMRR test conditions Go
  • Added Output sectionGo
  • Added typical characteristic curves to Table 1 Go
  • Added TA = 25°C to Typical Characteristics condition line Go
  • Added nine new histogram plots from Figure 2 to Figure 10Go
  • Changed Figure 11 to show more unitsGo
  • Changed Figure 19 Go
  • Added text to Application Information sectionGo
  • Changed text in Layout Guidelines sectionGo

Changes from * Revision (December 2013) to A Revision