JAJSEY8A March   2018  – January 2021 OPA197-Q1 , OPA2197-Q1 , OPA4197-Q1

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA197-Q1
    5. 6.5 Thermal Information: OPA2197-Q1
    6. 6.6 Thermal Information: OPA4197-Q1
    7. 6.7 Electrical Characteristics: VS = ±4 V to ±18 V (VS = 8 V to 36 V)
    8. 6.8 Electrical Characteristics: VS = ±2.25 V to ±4 V (VS = 4.5 V to 8 V)
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Protection Circuitry
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Phase Reversal Protection
      4. 7.3.4 Thermal Protection
      5. 7.3.5 Capacitive Load and Stability
      6. 7.3.6 Common-Mode Voltage Range
      7. 7.3.7 Electrical Overstress
      8. 7.3.8 Overload Recovery
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 16-Bit Precision Multiplexed Data-Acquisition System
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Slew-Rate Limit for Input Protection
      3. 8.2.3 Precision Reference Buffer
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 TINA-TI™ Simulation Software (Free Download)
        2. 11.1.1.2 TI Precision Designs
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 用語集
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

5 Pin Configuration and Functions

Figure 5-1 OPA197-Q1 DGK Package, 8-Pin VSSOP, Top View
Pin Functions: OPA197-Q1
PIN I/O DESCRIPTION
NAME NO.
+IN 3 I Noninverting input
–IN 2 I Inverting input
NC 1, 5, 8 — No internal connection (can be left floating)
OUT 6 O Output
V+ 7 — Positive (highest) power supply
V– 4 — Negative (lowest) power supply
Figure 5-2 OPA2197-Q1 DGK Package, 8-Pin VSSOP, Top View
Pin Functions: OPA2197-Q1
PIN I/O DESCRIPTION
NAME DGK (VSSOP)
+IN A 3 I Noninverting input, channel A
+IN B 5 I Noninverting input, channel B
–IN A 2 I Inverting input, channel A
–IN B 6 I Inverting input, channel B
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
V+ 8 — Positive (highest) power supply
V– 4 — Negative (lowest) power supply
Figure 5-3 OPA4197-Q1 PW Package, 14-Pin TSSOP, Top View
Pin Functions: OPA4197-Q1
PIN I/O DESCRIPTION
NAME NO.
+IN A 3 I Noninverting input, channel A
+IN B 5 I Noninverting input, channel B
+IN C 10 I Noninverting input, channel C
+IN D 12 I Noninverting input, channel D
–IN A 2 I Inverting input, channel A
–IN B 6 I Inverting input, channel B
–IN C 9 I Inverting input, channel C
–IN D 13 I Inverting input, channel D
OUT A 1 O Output, channel A
OUT B 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V+ 4 — Positive (highest) power supply
V– 11 — Negative (lowest) power supply